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[PULL 27/88] ppc/xive: Introduce a XivePresenter interface
From: |
David Gibson |
Subject: |
[PULL 27/88] ppc/xive: Introduce a XivePresenter interface |
Date: |
Tue, 17 Dec 2019 15:42:21 +1100 |
From: Cédric Le Goater <address@hidden>
When the XIVE IVRE sub-engine (XiveRouter) looks for a Notification
Virtual Target (NVT) to notify, it broadcasts a message on the
PowerBUS to find an XIVE IVPE sub-engine (Presenter) with the NVT
dispatched on one of its HW threads, and then forwards the
notification if any response was received.
The current XIVE presenter model is sufficient for the pseries machine
because it has a single interrupt controller device, but the PowerNV
machine can have multiple chips each having its own interrupt
controller. In this case, the XIVE presenter model is too simple and
the CAM line matching should scan all chips of the system.
To start fixing this issue, we first extend the XIVE Router model with
a new XivePresenter QOM interface representing the XIVE IVPE
sub-engine. This interface exposes a 'match_nvt' handler which the
sPAPR and PowerNV XIVE Router models will need to implement to perform
the CAM line matching.
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 26 +++++++++++++++++---------
include/hw/ppc/xive.h | 32 ++++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+), 9 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 511e1a9363..344bb3f3bc 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1363,9 +1363,10 @@ static uint32_t xive_tctx_hw_cam_line(XiveTCTX *tctx)
/*
* The thread context register words are in big-endian format.
*/
-static int xive_presenter_tctx_match(XiveTCTX *tctx, uint8_t format,
- uint8_t nvt_blk, uint32_t nvt_idx,
- bool cam_ignore, uint32_t logic_serv)
+int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
+ uint8_t format,
+ uint8_t nvt_blk, uint32_t nvt_idx,
+ bool cam_ignore, uint32_t logic_serv)
{
uint32_t cam = xive_nvt_cam_line(nvt_blk, nvt_idx);
uint32_t qw3w2 = xive_tctx_word2(&tctx->regs[TM_QW3_HV_PHYS]);
@@ -1422,11 +1423,6 @@ static int xive_presenter_tctx_match(XiveTCTX *tctx,
uint8_t format,
return -1;
}
-typedef struct XiveTCTXMatch {
- XiveTCTX *tctx;
- uint8_t ring;
-} XiveTCTXMatch;
-
static bool xive_presenter_match(XiveRouter *xrtr, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
@@ -1460,7 +1456,8 @@ static bool xive_presenter_match(XiveRouter *xrtr,
uint8_t format,
* Check the thread context CAM lines and record matches. We
* will handle CPU exception delivery later
*/
- ring = xive_presenter_tctx_match(tctx, format, nvt_blk, nvt_idx,
+ ring = xive_presenter_tctx_match(XIVE_PRESENTER(xrtr), tctx, format,
+ nvt_blk, nvt_idx,
cam_ignore, logic_serv);
/*
* Save the context and follow on to catch duplicates, that we
@@ -1754,6 +1751,7 @@ static const TypeInfo xive_router_info = {
.class_init = xive_router_class_init,
.interfaces = (InterfaceInfo[]) {
{ TYPE_XIVE_NOTIFIER },
+ { TYPE_XIVE_PRESENTER },
{ }
}
};
@@ -1923,10 +1921,20 @@ static const TypeInfo xive_notifier_info = {
.class_size = sizeof(XiveNotifierClass),
};
+/*
+ * XIVE Presenter
+ */
+static const TypeInfo xive_presenter_info = {
+ .name = TYPE_XIVE_PRESENTER,
+ .parent = TYPE_INTERFACE,
+ .class_size = sizeof(XivePresenterClass),
+};
+
static void xive_register_types(void)
{
type_register_static(&xive_source_info);
type_register_static(&xive_notifier_info);
+ type_register_static(&xive_presenter_info);
type_register_static(&xive_router_info);
type_register_static(&xive_end_source_info);
type_register_static(&xive_tctx_info);
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index fa7adf87fe..f9aa0fa0da 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -367,6 +367,38 @@ int xive_router_write_nvt(XiveRouter *xrtr, uint8_t
nvt_blk, uint32_t nvt_idx,
XiveTCTX *xive_router_get_tctx(XiveRouter *xrtr, CPUState *cs);
void xive_router_notify(XiveNotifier *xn, uint32_t lisn);
+/*
+ * XIVE Presenter
+ */
+
+typedef struct XiveTCTXMatch {
+ XiveTCTX *tctx;
+ uint8_t ring;
+} XiveTCTXMatch;
+
+typedef struct XivePresenter XivePresenter;
+
+#define TYPE_XIVE_PRESENTER "xive-presenter"
+#define XIVE_PRESENTER(obj) \
+ INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
+#define XIVE_PRESENTER_CLASS(klass) \
+ OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER)
+#define XIVE_PRESENTER_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER)
+
+typedef struct XivePresenterClass {
+ InterfaceClass parent;
+ int (*match_nvt)(XivePresenter *xptr, uint8_t format,
+ uint8_t nvt_blk, uint32_t nvt_idx,
+ bool cam_ignore, uint8_t priority,
+ uint32_t logic_serv, XiveTCTXMatch *match);
+} XivePresenterClass;
+
+int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
+ uint8_t format,
+ uint8_t nvt_blk, uint32_t nvt_idx,
+ bool cam_ignore, uint32_t logic_serv);
+
/*
* XIVE END ESBs
*/
--
2.23.0
- [PULL 12/88] xics: Link ICS_PROP_XICS property to ICSState::xics pointer, (continued)
- [PULL 12/88] xics: Link ICS_PROP_XICS property to ICSState::xics pointer, David Gibson, 2019/12/16
- [PULL 06/88] xive: Link "xive" property to XiveEndSource::xrtr pointer, David Gibson, 2019/12/16
- [PULL 07/88] ppc/pnv: Link "psi" property to PnvLpc::psi pointer, David Gibson, 2019/12/16
- [PULL 10/88] ppc/pnv: Link "chip" property to PnvCore::chip pointer, David Gibson, 2019/12/16
- [PULL 09/88] ppc/pnv: Link "chip" property to PnvHomer::chip pointer, David Gibson, 2019/12/16
- [PULL 11/88] ppc/pnv: Link "chip" property to PnvXive::chip pointer, David Gibson, 2019/12/16
- [PULL 15/88] spapr: Abort if XICS interrupt controller cannot be initialized, David Gibson, 2019/12/16
- [PULL 08/88] ppc/pnv: Link "psi" property to PnvOCC::psi pointer, David Gibson, 2019/12/16
- [PULL 19/88] ppc/pnv: Remove pnv_xive_vst_size() routine, David Gibson, 2019/12/16
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, David Gibson, 2019/12/16
- [PULL 27/88] ppc/xive: Introduce a XivePresenter interface,
David Gibson <=
- [PULL 26/88] ppc/pnv: Create BMC devices at machine init, David Gibson, 2019/12/16
- [PULL 28/88] ppc/xive: Implement the XivePresenter interface, David Gibson, 2019/12/16
- [PULL 16/88] ppc/pnv: Add a LPC "ranges" property, David Gibson, 2019/12/16
- [PULL 18/88] ppc/xive: Introduce helpers for the NVT id, David Gibson, 2019/12/16
- [PULL 20/88] xive/kvm: Trigger interrupts from userspace, David Gibson, 2019/12/16
- [PULL 14/88] xics: Link ICP_PROP_CPU property to ICPState::cs pointer, David Gibson, 2019/12/16
- [PULL 17/88] ppc/xive: Record the IPB in the associated NVT, David Gibson, 2019/12/16
- [PULL 23/88] ppc/xive: Check V bit in TM_PULL_POOL_CTX, David Gibson, 2019/12/16
- [PULL 21/88] ppc/pnv: Quiesce some XIVE errors, David Gibson, 2019/12/16
- [PULL 24/88] ipmi: Add support to customize OEM functions, David Gibson, 2019/12/16