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[PATCH v2 6/7] hw/char/exynos4210_uart: Add receive DMA support
From: |
Guenter Roeck |
Subject: |
[PATCH v2 6/7] hw/char/exynos4210_uart: Add receive DMA support |
Date: |
Sat, 18 Jan 2020 08:42:28 -0800 |
To support receive DMA, we need to inform the DMA controller if receive data
is available. Otherwise the DMA controller keeps requesting data, causing
receive errors.
Implement this using an interrupt line. The instantiating code then needs
to connect the interrupt with the matching DMA controller GPIO pin.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Guenter Roeck <address@hidden>
---
v2: Added Reviewed-by: tag
hw/char/exynos4210_uart.c | 24 ++++++++++++++++++++++++
hw/char/trace-events | 2 ++
2 files changed, 26 insertions(+)
diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c
index 63ea9663f2..6fe38fad3e 100644
--- a/hw/char/exynos4210_uart.c
+++ b/hw/char/exynos4210_uart.c
@@ -154,6 +154,7 @@ typedef struct Exynos4210UartState {
CharBackend chr;
qemu_irq irq;
+ qemu_irq dmairq;
uint32_t channel;
@@ -261,6 +262,24 @@ exynos4210_uart_Rx_FIFO_trigger_level(const
Exynos4210UartState *s)
return exynos4210_uart_FIFO_trigger_level(s->channel, reg);
}
+/*
+ * Update Rx DMA busy signal if Rx DMA is enabled. For simplicity,
+ * mark DMA as busy if DMA is enabled and the receive buffer is empty.
+ */
+static void exynos4210_uart_update_dmabusy(Exynos4210UartState *s)
+{
+ bool rx_dma_enabled = (s->reg[I_(UCON)] & 0x03) == 0x02;
+ uint32_t count = fifo_elements_number(&s->rx);
+
+ if (rx_dma_enabled && !count) {
+ qemu_irq_raise(s->dmairq);
+ trace_exynos_uart_dmabusy(s->channel);
+ } else {
+ qemu_irq_lower(s->dmairq);
+ trace_exynos_uart_dmaready(s->channel);
+ }
+}
+
static void exynos4210_uart_update_irq(Exynos4210UartState *s)
{
/*
@@ -282,10 +301,12 @@ static void
exynos4210_uart_update_irq(Exynos4210UartState *s)
count = fifo_elements_number(&s->rx);
if ((count && !(s->reg[I_(UCON)] & 0x80)) ||
count >= exynos4210_uart_Rx_FIFO_trigger_level(s)) {
+ exynos4210_uart_update_dmabusy(s);
s->reg[I_(UINTSP)] |= UINTSP_RXD;
timer_del(s->fifo_timeout_timer);
}
} else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) {
+ exynos4210_uart_update_dmabusy(s);
s->reg[I_(UINTSP)] |= UINTSP_RXD;
}
@@ -311,6 +332,7 @@ static void exynos4210_uart_timeout_int(void *opaque)
(s->reg[I_(UCON)] & (1 << 11))) {
s->reg[I_(UINTSP)] |= UINTSP_RXD;
s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_TIMEOUT;
+ exynos4210_uart_update_dmabusy(s);
exynos4210_uart_update_irq(s);
}
}
@@ -499,6 +521,7 @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr
offset,
s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY;
res = s->reg[I_(URXH)];
}
+ exynos4210_uart_update_dmabusy(s);
trace_exynos_uart_read(s->channel, offset,
exynos4210_uart_regname(offset), res);
return res;
@@ -666,6 +689,7 @@ static void exynos4210_uart_init(Object *obj)
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
+ sysbus_init_irq(dev, &s->dmairq);
}
static void exynos4210_uart_realize(DeviceState *dev, Error **errp)
diff --git a/hw/char/trace-events b/hw/char/trace-events
index cb73fee6a9..6f938301d9 100644
--- a/hw/char/trace-events
+++ b/hw/char/trace-events
@@ -79,6 +79,8 @@ nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size)
"addr 0x%" PRIx64
nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%"
PRIx64 " value 0x%" PRIx64 " size %u"
# exynos4210_uart.c
+exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)"
+exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready"
exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised:
0x%08"PRIx32
exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered"
exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int
data, int stop, uint64_t wordtime) "UART%d: speed: %d, parity: %c, data bits:
%d, stop bits: %d wordtime: %"PRId64"ns"
--
2.17.1
- [PATCH v2 2/7] hw/arm/exynos4210: Fix DMA initialization, (continued)
[PATCH v2 1/7] dma/pl330: Convert to support tracing, Guenter Roeck, 2020/01/18
[PATCH v2 4/7] hw/char/exynos4210_uart: Implement post_load function, Guenter Roeck, 2020/01/18
[PATCH v2 3/7] hw/char/exynos4210_uart: Convert to support tracing, Guenter Roeck, 2020/01/18
[PATCH v2 6/7] hw/char/exynos4210_uart: Add receive DMA support,
Guenter Roeck <=
[PATCH v2 5/7] hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts, Guenter Roeck, 2020/01/18
[PATCH v2 7/7] hw/arm/exynos4210: Connect serial port DMA busy signals with pl330, Guenter Roeck, 2020/01/18