[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v41 08/21] target/avr: Add instruction translation - MCU Control
From: |
Michael Rolnik |
Subject: |
[PATCH v41 08/21] target/avr: Add instruction translation - MCU Control Instructions |
Date: |
Sat, 18 Jan 2020 21:14:03 +0200 |
This includes:
- BREAK
- NOP
- SLEEP
- WDR
Signed-off-by: Michael Rolnik <address@hidden>
---
target/avr/translate.c | 68 ++++++++++++++++++++++++++++++++++++++++++
target/avr/insn.decode | 9 ++++++
2 files changed, 77 insertions(+)
diff --git a/target/avr/translate.c b/target/avr/translate.c
index 58775af17c..4c680070e2 100644
--- a/target/avr/translate.c
+++ b/target/avr/translate.c
@@ -2681,3 +2681,71 @@ static bool trans_BCLR(DisasContext *ctx, arg_BCLR *a)
return true;
}
+
+/*
+ * MCU Control Instructions
+ */
+
+/*
+ * The BREAK instruction is used by the On-chip Debug system, and is
+ * normally not used in the application software. When the BREAK instruction
is
+ * executed, the AVR CPU is set in the Stopped Mode. This gives the On-chip
+ * Debugger access to internal resources. If any Lock bits are set, or either
+ * the JTAGEN or OCDEN Fuses are unprogrammed, the CPU will treat the BREAK
+ * instruction as a NOP and will not enter the Stopped mode. This instruction
+ * is not available in all devices. Refer to the device specific instruction
+ * set summary.
+ */
+static bool trans_BREAK(DisasContext *ctx, arg_BREAK *a)
+{
+ if (!avr_have_feature(ctx, AVR_FEATURE_BREAK)) {
+ return true;
+ }
+
+#ifdef BREAKPOINT_ON_BREAK
+ tcg_gen_movi_tl(cpu_pc, ctx->npc - 1);
+ gen_helper_debug(cpu_env);
+ ctx->bstate = DISAS_EXIT;
+#else
+ /* NOP */
+#endif
+
+ return true;
+}
+
+
+/*
+ * This instruction performs a single cycle No Operation.
+ */
+static bool trans_NOP(DisasContext *ctx, arg_NOP *a)
+{
+
+ /* NOP */
+
+ return true;
+}
+
+
+/*
+ * This instruction sets the circuit in sleep mode defined by the MCU
+ * Control Register.
+ */
+static bool trans_SLEEP(DisasContext *ctx, arg_SLEEP *a)
+{
+ gen_helper_sleep(cpu_env);
+ ctx->bstate = DISAS_NORETURN;
+ return true;
+}
+
+
+/*
+ * This instruction resets the Watchdog Timer. This instruction must be
+ * executed within a limited time given by the WD prescaler. See the Watchdog
+ * Timer hardware specification.
+ */
+static bool trans_WDR(DisasContext *ctx, arg_WDR *a)
+{
+ gen_helper_wdr(cpu_env);
+
+ return true;
+}
diff --git a/target/avr/insn.decode b/target/avr/insn.decode
index 4ee55862b2..0e4ec9ddf0 100644
--- a/target/avr/insn.decode
+++ b/target/avr/insn.decode
@@ -172,3 +172,12 @@ BST 1111 101 rd:5 0 bit:3
BLD 1111 100 rd:5 0 bit:3
BSET 1001 0100 0 bit:3 1000
BCLR 1001 0100 1 bit:3 1000
+
+#
+# MCU Control Instructions
+#
+BREAK 1001 0101 1001 1000
+NOP 0000 0000 0000 0000
+SLEEP 1001 0101 1000 1000
+WDR 1001 0101 1010 1000
+
--
2.17.2 (Apple Git-113)
- [PATCH v41 00/21] QEMU AVR 8 bit cores, Michael Rolnik, 2020/01/18
- [PATCH v41 01/21] target/avr: Add outward facing interfaces and core CPU logic, Michael Rolnik, 2020/01/18
- [PATCH v41 02/21] target/avr: Add instruction helpers, Michael Rolnik, 2020/01/18
- [PATCH v41 03/21] target/avr: Add instruction translation - Registers definition, Michael Rolnik, 2020/01/18
- [PATCH v41 04/21] target/avr: Add instruction translation - Arithmetic and Logic Instructions, Michael Rolnik, 2020/01/18
- [PATCH v41 05/21] target/avr: Add instruction translation - Branch Instructions, Michael Rolnik, 2020/01/18
- [PATCH v41 06/21] target/avr: Add instruction translation - Data Transfer Instructions, Michael Rolnik, 2020/01/18
- [PATCH v41 07/21] target/avr: Add instruction translation - Bit and Bit-test Instructions, Michael Rolnik, 2020/01/18
- [PATCH v41 08/21] target/avr: Add instruction translation - MCU Control Instructions,
Michael Rolnik <=
- [PATCH v41 09/21] target/avr: Add instruction translation - CPU main translation function, Michael Rolnik, 2020/01/18
- [PATCH v41 10/21] target/avr: Add instruction disassembly function, Michael Rolnik, 2020/01/18
- [PATCH v41 11/21] hw/avr: Add limited support for USART peripheral, Michael Rolnik, 2020/01/18
- [PATCH v41 12/21] hw/avr: Add limited support for 16 bit timer peripheral, Michael Rolnik, 2020/01/18
- [PATCH v41 13/21] hw/avr: Add dummy mask device, Michael Rolnik, 2020/01/18
- [PATCH v41 14/21] hw/avr: Add example board configuration, Michael Rolnik, 2020/01/18
- [PATCH v41 15/21] target/avr: Add section about AVR into QEMU documentation, Michael Rolnik, 2020/01/18
- [PATCH v41 16/21] target/avr: Register AVR support with the rest of QEMU, Michael Rolnik, 2020/01/18