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[PATCH v3 2/8] hw/core/or-irq: Increase limit of or-lines to 48
From: |
Guenter Roeck |
Subject: |
[PATCH v3 2/8] hw/core/or-irq: Increase limit of or-lines to 48 |
Date: |
Wed, 22 Jan 2020 21:25:34 -0800 |
Exynos DMA requires up to 33 interrupt lines (32 event interrupts
plus abort interrupt), which all need to be wired together. Increase
the maximum number of or-irq lines to 48 to support this configuration.
Signed-off-by: Guenter Roeck <address@hidden>
---
v3: Added patch
include/hw/or-irq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
index 3a3230dd84..0038bfbe3d 100644
--- a/include/hw/or-irq.h
+++ b/include/hw/or-irq.h
@@ -33,7 +33,7 @@
/* This can safely be increased if necessary without breaking
* migration compatibility (as long as it remains greater than 15).
*/
-#define MAX_OR_LINES 32
+#define MAX_OR_LINES 48
typedef struct OrIRQState qemu_or_irq;
--
2.17.1
- [PATCH v3 0/8] Fix Exynos4210 DMA support, Guenter Roeck, 2020/01/23
- [PATCH v3 3/8] hw/arm/exynos4210: Fix DMA initialization, Guenter Roeck, 2020/01/23
- [PATCH v3 5/8] hw/char/exynos4210_uart: Implement post_load function, Guenter Roeck, 2020/01/23
- [PATCH v3 4/8] hw/char/exynos4210_uart: Convert to support tracing, Guenter Roeck, 2020/01/23
- [PATCH v3 6/8] hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts, Guenter Roeck, 2020/01/23
- [PATCH v3 8/8] hw/arm/exynos4210: Connect serial port DMA busy signals with pl330, Guenter Roeck, 2020/01/23
- [PATCH v3 7/8] hw/char/exynos4210_uart: Add receive DMA support, Guenter Roeck, 2020/01/23