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[PATCH v2 26/35] target/riscv: Disable guest FP support based on virtual
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From: |
Alistair Francis |
|
Subject: |
[PATCH v2 26/35] target/riscv: Disable guest FP support based on virtual status |
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Date: |
Fri, 31 Jan 2020 17:02:44 -0800 |
When the Hypervisor extension is in use we only enable floating point
support when both status and vsstatus have enabled floating point
support.
Signed-off-by: Alistair Francis <address@hidden>
---
target/riscv/cpu_helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index e7728cb0ca..827a38324c 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -99,6 +99,9 @@ bool riscv_cpu_exec_interrupt(CPUState *cs, int
interrupt_request)
bool riscv_cpu_fp_enabled(CPURISCVState *env)
{
if (env->mstatus & MSTATUS_FS) {
+ if (riscv_cpu_virt_enabled(env) && !(env->mstatus_hs & MSTATUS_FS)) {
+ return false;
+ }
return true;
}
--
2.25.0
- [PATCH v2 15/35] target/riscv: Set VS bits in mideleg for Hyp extension, (continued)
- [PATCH v2 15/35] target/riscv: Set VS bits in mideleg for Hyp extension, Alistair Francis, 2020/01/31
- [PATCH v2 16/35] target/riscv: Extend the MIE CSR to support virtulisation, Alistair Francis, 2020/01/31
- [PATCH v2 18/35] target/riscv: Add support for virtual interrupt setting, Alistair Francis, 2020/01/31
- [PATCH v2 21/35] target/riscv: Add hypvervisor trap support, Alistair Francis, 2020/01/31
- [PATCH v2 20/35] target/riscv: Generate illegal instruction on WFI when V=1, Alistair Francis, 2020/01/31
- [PATCH v2 19/35] target/ricsv: Flush the TLB on virtulisation mode changes, Alistair Francis, 2020/01/31
- [PATCH v2 22/35] target/riscv: Add Hypervisor trap return support, Alistair Francis, 2020/01/31
- [PATCH v2 25/35] target/riscv: Only set TB flags with FP status if enabled, Alistair Francis, 2020/01/31
- [PATCH v2 24/35] target/riscv: Remove the hret instruction, Alistair Francis, 2020/01/31
- [PATCH v2 23/35] target/riscv: Add hfence instructions, Alistair Francis, 2020/01/31
- [PATCH v2 26/35] target/riscv: Disable guest FP support based on virtual status,
Alistair Francis <=
- [PATCH v2 28/35] target/riscv: Respect MPRV and SPRV for floating point ops, Alistair Francis, 2020/01/31
- [PATCH v2 27/35] target/riscv: Mark both sstatus and msstatus_hs as dirty, Alistair Francis, 2020/01/31
- [PATCH v2 29/35] target/riscv: Allow specifying MMU stage, Alistair Francis, 2020/01/31
- [PATCH v2 32/35] target/riscv: Set htval and mtval2 on execptions, Alistair Francis, 2020/01/31
- [PATCH v2 30/35] target/riscv: Implement second stage MMU, Alistair Francis, 2020/01/31
- [PATCH v2 31/35] target/riscv: Raise the new execptions when 2nd stage translation fails, Alistair Francis, 2020/01/31
- [PATCH v2 33/35] target/riscv: Add support for the 32-bit MSTATUSH CSR, Alistair Francis, 2020/01/31
- [PATCH v2 34/35] target/riscv: Add the MSTATUS_MPV_ISSET helper macro, Alistair Francis, 2020/01/31
- [PATCH v2 35/35] target/riscv: Allow enabling the Hypervisor extension, Alistair Francis, 2020/01/31