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[PATCH v7 05/41] target/arm: Update CNTVCT_EL0 for VHE
From: |
Richard Henderson |
Subject: |
[PATCH v7 05/41] target/arm: Update CNTVCT_EL0 for VHE |
Date: |
Thu, 6 Feb 2020 10:54:12 +0000 |
The virtual offset may be 0 depending on EL, E2H and TGE.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/helper.c | 40 +++++++++++++++++++++++++++++++++++++---
1 file changed, 37 insertions(+), 3 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c7ee0d603f..dbfdf2324b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2515,9 +2515,31 @@ static uint64_t gt_cnt_read(CPUARMState *env, const
ARMCPRegInfo *ri)
return gt_get_countervalue(env);
}
+static uint64_t gt_virt_cnt_offset(CPUARMState *env)
+{
+ uint64_t hcr;
+
+ switch (arm_current_el(env)) {
+ case 2:
+ hcr = arm_hcr_el2_eff(env);
+ if (hcr & HCR_E2H) {
+ return 0;
+ }
+ break;
+ case 0:
+ hcr = arm_hcr_el2_eff(env);
+ if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
+ return 0;
+ }
+ break;
+ }
+
+ return env->cp15.cntvoff_el2;
+}
+
static uint64_t gt_virt_cnt_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
- return gt_get_countervalue(env) - env->cp15.cntvoff_el2;
+ return gt_get_countervalue(env) - gt_virt_cnt_offset(env);
}
static void gt_cval_write(CPUARMState *env, const ARMCPRegInfo *ri,
@@ -2532,7 +2554,13 @@ static void gt_cval_write(CPUARMState *env, const
ARMCPRegInfo *ri,
static uint64_t gt_tval_read(CPUARMState *env, const ARMCPRegInfo *ri,
int timeridx)
{
- uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;
+ uint64_t offset = 0;
+
+ switch (timeridx) {
+ case GTIMER_VIRT:
+ offset = gt_virt_cnt_offset(env);
+ break;
+ }
return (uint32_t)(env->cp15.c14_timer[timeridx].cval -
(gt_get_countervalue(env) - offset));
@@ -2542,7 +2570,13 @@ static void gt_tval_write(CPUARMState *env, const
ARMCPRegInfo *ri,
int timeridx,
uint64_t value)
{
- uint64_t offset = timeridx == GTIMER_VIRT ? env->cp15.cntvoff_el2 : 0;
+ uint64_t offset = 0;
+
+ switch (timeridx) {
+ case GTIMER_VIRT:
+ offset = gt_virt_cnt_offset(env);
+ break;
+ }
trace_arm_gt_tval_write(timeridx, value);
env->cp15.c14_timer[timeridx].cval = gt_get_countervalue(env) - offset +
--
2.20.1
- [PATCH v7 00/41] target/arm: Implement ARMv8.1-VHE, Richard Henderson, 2020/02/06
- [PATCH v7 01/41] target/arm: Define isar_feature_aa64_vh, Richard Henderson, 2020/02/06
- [PATCH v7 02/41] target/arm: Enable HCR_E2H for VHE, Richard Henderson, 2020/02/06
- [PATCH v7 03/41] target/arm: Add CONTEXTIDR_EL2, Richard Henderson, 2020/02/06
- [PATCH v7 04/41] target/arm: Add TTBR1_EL2, Richard Henderson, 2020/02/06
- [PATCH v7 06/41] target/arm: Split out vae1_tlbmask, Richard Henderson, 2020/02/06
- [PATCH v7 05/41] target/arm: Update CNTVCT_EL0 for VHE,
Richard Henderson <=
- [PATCH v7 08/41] target/arm: Simplify tlb_force_broadcast alternatives, Richard Henderson, 2020/02/06
- [PATCH v7 09/41] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_*, Richard Henderson, 2020/02/06
- [PATCH v7 10/41] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2, Richard Henderson, 2020/02/06
- [PATCH v7 11/41] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*, Richard Henderson, 2020/02/06
- [PATCH v7 14/41] target/arm: Rename ARMMMUIdx_S1E2 to ARMMMUIdx_E2, Richard Henderson, 2020/02/06
- [PATCH v7 16/41] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits, Richard Henderson, 2020/02/06
- [PATCH v7 07/41] target/arm: Split out alle1_tlbmask, Richard Henderson, 2020/02/06
- [PATCH v7 12/41] target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01], Richard Henderson, 2020/02/06
- [PATCH v7 18/41] target/arm: Tidy ARMMMUIdx m-profile definitions, Richard Henderson, 2020/02/06
- [PATCH v7 15/41] target/arm: Recover 4 bits from TBFLAGs, Richard Henderson, 2020/02/06