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[PATCH rc5 07/32] target/avr: Introduce enumeration AVRFeature
From: |
Aleksandar Markovic |
Subject: |
[PATCH rc5 07/32] target/avr: Introduce enumeration AVRFeature |
Date: |
Fri, 7 Feb 2020 02:57:35 +0100 |
From: Michael Rolnik <address@hidden>
This patch introduces enumeration "AVRFeature" that will be
used for defining various AVR core types.
[AM: Split a larger AVR introduction patch into logical units]
Suggested-by: Aleksandar Markovic <address@hidden>
Co-developed-by: Michael Rolnik <address@hidden>
Co-developed-by: Sarah Harris <address@hidden>
Signed-off-by: Michael Rolnik <address@hidden>
Signed-off-by: Sarah Harris <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Acked-by: Igor Mammedov <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
---
target/avr/cpu.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index a5213bd..459e177 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -72,6 +72,42 @@
*/
#define OFFSET_IO_REGISTERS (OFFSET_DATA + NUMBER_OF_CPU_REGISTERS)
+typedef enum AVRFeature {
+ AVR_FEATURE_SRAM,
+
+ AVR_FEATURE_1_BYTE_PC,
+ AVR_FEATURE_2_BYTE_PC,
+ AVR_FEATURE_3_BYTE_PC,
+
+ AVR_FEATURE_1_BYTE_SP,
+ AVR_FEATURE_2_BYTE_SP,
+
+ AVR_FEATURE_BREAK,
+ AVR_FEATURE_DES,
+ AVR_FEATURE_RMW, /* Read Modify Write - XCH LAC LAS LAT */
+
+ AVR_FEATURE_EIJMP_EICALL,
+ AVR_FEATURE_IJMP_ICALL,
+ AVR_FEATURE_JMP_CALL,
+
+ AVR_FEATURE_ADIW_SBIW,
+
+ AVR_FEATURE_SPM,
+ AVR_FEATURE_SPMX,
+
+ AVR_FEATURE_ELPMX,
+ AVR_FEATURE_ELPM,
+ AVR_FEATURE_LPMX,
+ AVR_FEATURE_LPM,
+
+ AVR_FEATURE_MOVW,
+ AVR_FEATURE_MUL,
+ AVR_FEATURE_RAMPD,
+ AVR_FEATURE_RAMPX,
+ AVR_FEATURE_RAMPY,
+ AVR_FEATURE_RAMPZ,
+} AVRFeature;
+
typedef struct CPUAVRState CPUAVRState;
struct CPUAVRState {
@@ -126,6 +162,16 @@ hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr
addr);
int avr_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+static inline int avr_feature(CPUAVRState *env, AVRFeature feature)
+{
+ return (env->features & (1U << feature)) != 0;
+}
+
+static inline void set_avr_feature(CPUAVRState *env, int feature)
+{
+ env->features |= (1U << feature);
+}
+
#define cpu_list avr_cpu_list
#define cpu_signal_handler cpu_avr_signal_handler
#define cpu_mmu_index avr_cpu_mmu_index
--
2.7.4
- [PATCH rc5 00/32] target/avr merger, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 07/32] target/avr: Introduce enumeration AVRFeature,
Aleksandar Markovic <=
- [PATCH rc5 05/32] target/avr: CPU class: Add migration support, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 01/32] target/avr: Add basic parameters of the new platform, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 04/32] target/avr: CPU class: Add memory menagement support, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 03/32] target/avr: CPU class: Add interrupt handling support, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 06/32] target/avr: CPU class: Add GDB support, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 15/32] target/avr: Add instruction translation - MCU Control Instructions, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 02/32] target/avr: Introduce basic CPU class object, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 16/32] target/avr: Add instruction translation - CPU main translation function, Aleksandar Markovic, 2020/02/06
- [PATCH rc5 14/32] target/avr: Add instruction translation - Bit and Bit-test Instructions, Aleksandar Markovic, 2020/02/06