[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 33/48] target/arm: Update arm_phys_excp_target_el for TGE
From: |
Peter Maydell |
Subject: |
[PULL 33/48] target/arm: Update arm_phys_excp_target_el for TGE |
Date: |
Fri, 7 Feb 2020 14:33:28 +0000 |
From: Richard Henderson <address@hidden>
The TGE bit routes all asynchronous exceptions to EL2.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 3b7b459314d..56a62b11d09 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8446,6 +8446,12 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t
excp_idx,
break;
};
+ /*
+ * For these purposes, TGE and AMO/IMO/FMO both force the
+ * interrupt to EL2. Fold TGE into the bit extracted above.
+ */
+ hcr |= (hcr_el2 & HCR_TGE) != 0;
+
/* Perform a table-lookup for the target EL given the current state */
target_el = target_el_table[is64][scr][rw][hcr][secure][cur_el];
--
2.20.1
- [PULL 23/48] target/arm: Update arm_sctlr for VHE, (continued)
- [PULL 23/48] target/arm: Update arm_sctlr for VHE, Peter Maydell, 2020/02/07
- [PULL 24/48] target/arm: Update aa64_zva_access for EL2, Peter Maydell, 2020/02/07
- [PULL 25/48] target/arm: Update ctr_el0_access for EL2, Peter Maydell, 2020/02/07
- [PULL 26/48] target/arm: Add the hypervisor virtual counter, Peter Maydell, 2020/02/07
- [PULL 27/48] target/arm: Update timer access for VHE, Peter Maydell, 2020/02/07
- [PULL 28/48] target/arm: Update define_one_arm_cp_reg_with_opaque for VHE, Peter Maydell, 2020/02/07
- [PULL 31/48] target/arm: Flush tlb for ASID changes in EL2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 29/48] target/arm: Add VHE system register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 30/48] target/arm: Add VHE timer register redirection and aliasing, Peter Maydell, 2020/02/07
- [PULL 32/48] target/arm: Flush tlbs for E2&0 translation regime, Peter Maydell, 2020/02/07
- [PULL 33/48] target/arm: Update arm_phys_excp_target_el for TGE,
Peter Maydell <=
- [PULL 34/48] target/arm: Update {fp,sve}_exception_el for VHE, Peter Maydell, 2020/02/07
- [PULL 35/48] target/arm: check TGE and E2H flags for EL0 pauth traps, Peter Maydell, 2020/02/07
- [PULL 36/48] target/arm: Update get_a64_user_mem_index for VHE, Peter Maydell, 2020/02/07
- [PULL 38/48] target/arm: Enable ARMv8.1-VHE in -cpu max, Peter Maydell, 2020/02/07
- [PULL 37/48] target/arm: Update arm_cpu_do_interrupt_aarch64 for VHE, Peter Maydell, 2020/02/07
- [PULL 40/48] target/arm: Pass more cpu state to arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 41/48] target/arm: Use bool for unmasked in arm_excp_unmasked, Peter Maydell, 2020/02/07
- [PULL 43/48] bcm2835_dma: Fix the ylen loop in TD mode, Peter Maydell, 2020/02/07
- [PULL 39/48] target/arm: Move arm_excp_unmasked to cpu.c, Peter Maydell, 2020/02/07
- [PULL 42/48] target/arm: Raise only one interrupt in arm_cpu_exec_interrupt, Peter Maydell, 2020/02/07