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[RFC PATCH 47/66] Hexagon TCG generation - step 10
From: |
Taylor Simpson |
Subject: |
[RFC PATCH 47/66] Hexagon TCG generation - step 10 |
Date: |
Mon, 10 Feb 2020 18:40:25 -0600 |
Override compound compare and jump instructions
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/helper_overrides.h | 105 ++++++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 52e4a47..c651bbc 100644
--- a/target/hexagon/helper_overrides.h
+++ b/target/hexagon/helper_overrides.h
@@ -1327,4 +1327,109 @@
#define fWRAP_J2_endloop1(GENHLPR, SHORTCODE) \
gen_endloop1()
+/*
+ * Compound compare and jump instructions
+ * Here is a primer to understand the tag names
+ *
+ * Comparison
+ * cmpeqi compare equal to an immediate
+ * cmpgti compare greater than an immediate
+ * cmpgtiu compare greater than an unsigned immediate
+ * cmpeqn1 compare equal to negative 1
+ * cmpgtn1 compare greater than negative 1
+ * cmpeq compare equal (two registers)
+ *
+ * Condition
+ * tp0 p0 is true p0 = cmp.eq(r0,#5); if (p0.new) jump:nt address
+ * fp0 p0 is false p0 = cmp.eq(r0,#5); if (!p0.new) jump:nt
address
+ * tp1 p1 is true p1 = cmp.eq(r0,#5); if (p1.new) jump:nt address
+ * fp1 p1 is false p1 = cmp.eq(r0,#5); if (!p1.new) jump:nt
address
+ *
+ * Prediction (not modelled in qemu)
+ * _nt not taken
+ * _t taken
+ */
+#define fWRAP_J4_cmpeqi_tp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_EQ, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_fp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_EQ, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_EQ, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_fp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_EQ, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_tp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_EQ, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_fp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_EQ, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_tp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_EQ, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqi_fp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_EQ, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_tp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GT, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_fp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GT, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GT, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_fp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GT, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_tp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GT, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_fp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GT, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_tp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GT, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgti_fp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GT, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_tp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GTU, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_fp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GTU, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GTU, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_fp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(0, TCG_COND_GTU, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_tp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GTU, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_fp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GTU, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_tp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GTU, true, RsV, UiV, riV)
+#define fWRAP_J4_cmpgtui_fp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmpi_jmp(1, TCG_COND_GTU, false, RsV, UiV, riV)
+#define fWRAP_J4_cmpeqn1_tp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_EQ, true, RsV, riV)
+#define fWRAP_J4_cmpeqn1_fp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_EQ, false, RsV, riV)
+#define fWRAP_J4_cmpeqn1_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_EQ, true, RsV, riV)
+#define fWRAP_J4_cmpeqn1_fp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_EQ, false, RsV, riV)
+#define fWRAP_J4_cmpeqn1_tp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_EQ, true, RsV, riV)
+#define fWRAP_J4_cmpeqn1_fp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_EQ, false, RsV, riV)
+#define fWRAP_J4_cmpeqn1_tp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_EQ, true, RsV, riV)
+#define fWRAP_J4_cmpeqn1_fp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_EQ, false, RsV, riV)
+#define fWRAP_J4_cmpgtn1_tp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_GT, true, RsV, riV)
+#define fWRAP_J4_cmpgtn1_fp0_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_GT, false, RsV, riV)
+#define fWRAP_J4_cmpgtn1_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_GT, true, RsV, riV)
+#define fWRAP_J4_cmpgtn1_fp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(0, TCG_COND_GT, false, RsV, riV)
+#define fWRAP_J4_cmpgtn1_tp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_GT, true, RsV, riV)
+#define fWRAP_J4_cmpgtn1_fp1_jump_nt(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_GT, false, RsV, riV)
+#define fWRAP_J4_cmpgtn1_tp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_GT, true, RsV, riV)
+#define fWRAP_J4_cmpgtn1_fp1_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_n1_jmp(1, TCG_COND_GT, false, RsV, riV)
+#define fWRAP_J4_cmpeq_tp0_jump_t(GENHLPR, SHORTCODE) \
+ gen_cmpnd_cmp_jmp(0, TCG_COND_EQ, true, RsV, RtV, riV)
+
#endif
--
2.7.4
- [RFC PATCH 34/66] Hexagon TCG generation helpers - step 2, (continued)
- [RFC PATCH 34/66] Hexagon TCG generation helpers - step 2, Taylor Simpson, 2020/02/10
- [RFC PATCH 38/66] Hexagon TCG generation - step 01, Taylor Simpson, 2020/02/10
- [RFC PATCH 37/66] Hexagon TCG generation helpers - step 5, Taylor Simpson, 2020/02/10
- [RFC PATCH 39/66] Hexagon TCG generation - step 02, Taylor Simpson, 2020/02/10
- [RFC PATCH 40/66] Hexagon TCG generation - step 03, Taylor Simpson, 2020/02/10
- [RFC PATCH 41/66] Hexagon TCG generation - step 04, Taylor Simpson, 2020/02/10
- [RFC PATCH 46/66] Hexagon TCG generation - step 09, Taylor Simpson, 2020/02/10
- [RFC PATCH 43/66] Hexagon TCG generation - step 06, Taylor Simpson, 2020/02/10
- [RFC PATCH 15/66] Hexagon arch import - instruction semantics definitions, Taylor Simpson, 2020/02/10
- [RFC PATCH 42/66] Hexagon TCG generation - step 05, Taylor Simpson, 2020/02/10
- [RFC PATCH 47/66] Hexagon TCG generation - step 10,
Taylor Simpson <=
- [RFC PATCH 44/66] Hexagon TCG generation - step 07, Taylor Simpson, 2020/02/10
- [RFC PATCH 45/66] Hexagon TCG generation - step 08, Taylor Simpson, 2020/02/10
- [RFC PATCH 49/66] Hexagon TCG generation - step 12, Taylor Simpson, 2020/02/10
- [RFC PATCH 53/66] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition, Taylor Simpson, 2020/02/10
- [RFC PATCH 48/66] Hexagon TCG generation - step 11, Taylor Simpson, 2020/02/10
- [RFC PATCH 54/66] Hexagon HVX support in gdbstub, Taylor Simpson, 2020/02/10
- [RFC PATCH 66/66] Hexagon HVX build infrastructure, Taylor Simpson, 2020/02/10
- [RFC PATCH 50/66] Hexagon translation, Taylor Simpson, 2020/02/10
- [RFC PATCH 64/66] Hexagon HVX TCG generation, Taylor Simpson, 2020/02/10
- [RFC PATCH 51/66] Hexagon Linux user emulation, Taylor Simpson, 2020/02/10