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Re: [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test f


From: Richard Henderson
Subject: Re: [PATCH 07/13] target/arm: Define an aa32_pmu_8_1 isar feature test function
Date: Tue, 11 Feb 2020 10:38:37 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

On 2/11/20 9:37 AM, Peter Maydell wrote:
> Instead of open-coding a check on the ID_DFR0 PerfMon ID register
> field, create a standardly-named isar_feature for "does AArch32 have
> a v8.1 PMUv3" and use it.
> 
> This entails moving the id_dfr0 field into the ARMISARegisters struct.
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/cpu.h      |  9 ++++++++-
>  hw/intc/armv7m_nvic.c |  2 +-
>  target/arm/cpu.c      | 28 ++++++++++++++--------------
>  target/arm/cpu64.c    |  6 +++---
>  target/arm/helper.c   |  5 ++---
>  5 files changed, 28 insertions(+), 22 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~




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