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[PATCH v30 13/22] target/rx: Dump bytes for each insn during disassembly
From: |
Yoshinori Sato |
Subject: |
[PATCH v30 13/22] target/rx: Dump bytes for each insn during disassembly |
Date: |
Wed, 12 Feb 2020 22:03:02 +0900 |
From: Richard Henderson <address@hidden>
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Yoshinori Sato <address@hidden>
Signed-off-by: Yoshinori Sato <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/rx/disas.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/target/rx/disas.c b/target/rx/disas.c
index 5a32a87534..d73b53db44 100644
--- a/target/rx/disas.c
+++ b/target/rx/disas.c
@@ -102,7 +102,21 @@ static int bdsp_s(DisasContext *ctx, int d)
/* Include the auto-generated decoder. */
#include "decode.inc.c"
-#define prt(...) (ctx->dis->fprintf_func)((ctx->dis->stream), __VA_ARGS__)
+static void dump_bytes(DisasContext *ctx)
+{
+ int i, len = ctx->len;
+
+ for (i = 0; i < len; ++i) {
+ ctx->dis->fprintf_func(ctx->dis->stream, "%02x ", ctx->bytes[i]);
+ }
+ ctx->dis->fprintf_func(ctx->dis->stream, "%*c", (8 - i) * 3, '\t');
+}
+
+#define prt(...) \
+ do { \
+ dump_bytes(ctx); \
+ ctx->dis->fprintf_func(ctx->dis->stream, __VA_ARGS__); \
+ } while (0)
#define RX_MEMORY_BYTE 0
#define RX_MEMORY_WORD 1
--
2.20.1
- [PATCH v30 00/22] Add RX archtecture support, Yoshinori Sato, 2020/02/12
- [PATCH v30 03/22] hw/registerfields.h: Add 8bit and 16bit register macros, Yoshinori Sato, 2020/02/12
- [PATCH v30 11/22] target/rx: Emit all disassembly in one prt(), Yoshinori Sato, 2020/02/12
- [PATCH v30 17/22] hw/rx: RX Target hardware definition, Yoshinori Sato, 2020/02/12
- [PATCH v30 18/22] hw/rx: Honor -accel qtest, Yoshinori Sato, 2020/02/12
- [PATCH v30 05/22] target/rx: TCG helper, Yoshinori Sato, 2020/02/12
- [PATCH v30 20/22] Add rx-softmmu, Yoshinori Sato, 2020/02/12
- [PATCH v30 16/22] hw/char: RX62N serial communication interface (SCI), Yoshinori Sato, 2020/02/12
- [PATCH v30 01/22] MAINTAINERS: Add RX, Yoshinori Sato, 2020/02/12
- [PATCH v30 06/22] target/rx: CPU definition, Yoshinori Sato, 2020/02/12
- [PATCH v30 13/22] target/rx: Dump bytes for each insn during disassembly,
Yoshinori Sato <=
- [PATCH v30 12/22] target/rx: Collect all bytes during disassembly, Yoshinori Sato, 2020/02/12
- [PATCH v30 10/22] target/rx: Use prt_ldmi for XCHG_mr disassembly, Yoshinori Sato, 2020/02/12
- [PATCH v30 22/22] qemu-doc.texi: Add RX section., Yoshinori Sato, 2020/02/12
- [PATCH v30 14/22] hw/intc: RX62N interrupt controller (ICUa), Yoshinori Sato, 2020/02/12
- [PATCH v30 02/22] qemu/bitops.h: Add extract8 and extract16, Yoshinori Sato, 2020/02/12
- [PATCH v30 04/22] target/rx: TCG translation, Yoshinori Sato, 2020/02/12
- [PATCH v30 09/22] target/rx: Replace operand with prt_ldmi in disassembler, Yoshinori Sato, 2020/02/12
- [PATCH v30 19/22] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core, Yoshinori Sato, 2020/02/12
- [PATCH v30 08/22] target/rx: Disassemble rx_index_addr into a string, Yoshinori Sato, 2020/02/12
- [PATCH v30 07/22] target/rx: RX disassembler, Yoshinori Sato, 2020/02/12