[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 28/46] target/arm: Implement UAO semantics
From: |
Peter Maydell |
Subject: |
[PULL 28/46] target/arm: Implement UAO semantics |
Date: |
Thu, 13 Feb 2020 14:41:27 +0000 |
From: Richard Henderson <address@hidden>
We need only override the current condition under which
TBFLAG_A64.UNPRIV is set.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 41 +++++++++++++++++++++--------------------
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 11a5f0be52f..366dbcf460d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12198,28 +12198,29 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env,
int el, int fp_el,
}
/* Compute the condition for using AccType_UNPRIV for LDTR et al. */
- /* TODO: ARMv8.2-UAO */
- switch (mmu_idx) {
- case ARMMMUIdx_E10_1:
- case ARMMMUIdx_E10_1_PAN:
- case ARMMMUIdx_SE10_1:
- case ARMMMUIdx_SE10_1_PAN:
- /* TODO: ARMv8.3-NV */
- flags = FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1);
- break;
- case ARMMMUIdx_E20_2:
- case ARMMMUIdx_E20_2_PAN:
- /* TODO: ARMv8.4-SecEL2 */
- /*
- * Note that E20_2 is gated by HCR_EL2.E2H == 1, but E20_0 is
- * gated by HCR_EL2.<E2H,TGE> == '11', and so is LDTR.
- */
- if (env->cp15.hcr_el2 & HCR_TGE) {
+ if (!(env->pstate & PSTATE_UAO)) {
+ switch (mmu_idx) {
+ case ARMMMUIdx_E10_1:
+ case ARMMMUIdx_E10_1_PAN:
+ case ARMMMUIdx_SE10_1:
+ case ARMMMUIdx_SE10_1_PAN:
+ /* TODO: ARMv8.3-NV */
flags = FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1);
+ break;
+ case ARMMMUIdx_E20_2:
+ case ARMMMUIdx_E20_2_PAN:
+ /* TODO: ARMv8.4-SecEL2 */
+ /*
+ * Note that EL20_2 is gated by HCR_EL2.E2H == 1, but EL20_0 is
+ * gated by HCR_EL2.<E2H,TGE> == '11', and so is LDTR.
+ */
+ if (env->cp15.hcr_el2 & HCR_TGE) {
+ flags = FIELD_DP32(flags, TBFLAG_A64, UNPRIV, 1);
+ }
+ break;
+ default:
+ break;
}
- break;
- default:
- break;
}
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
--
2.20.1
- [PULL 18/46] target/arm: Remove CPSR_RESERVED, (continued)
- [PULL 18/46] target/arm: Remove CPSR_RESERVED, Peter Maydell, 2020/02/13
- [PULL 21/46] target/arm: Update arm_mmu_idx_el for PAN, Peter Maydell, 2020/02/13
- [PULL 20/46] target/arm: Update MSR access for PAN, Peter Maydell, 2020/02/13
- [PULL 13/46] target/arm: Move LOR regdefs to file scope, Peter Maydell, 2020/02/13
- [PULL 23/46] target/arm: Set PAN bit as required on exception entry, Peter Maydell, 2020/02/13
- [PULL 27/46] target/arm: Update MSR access to UAO, Peter Maydell, 2020/02/13
- [PULL 26/46] target/arm: Add ID_AA64MMFR2_EL1, Peter Maydell, 2020/02/13
- [PULL 24/46] target/arm: Implement ATS1E1 system registers, Peter Maydell, 2020/02/13
- [PULL 25/46] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max, Peter Maydell, 2020/02/13
- [PULL 30/46] hw/arm: ast2400/ast2500: Wire up EHCI controllers, Peter Maydell, 2020/02/13
- [PULL 28/46] target/arm: Implement UAO semantics,
Peter Maydell <=
- [PULL 29/46] target/arm: Enable ARMv8.2-UAO in -cpu max, Peter Maydell, 2020/02/13
- [PULL 31/46] hw/arm: ast2600: Wire up EHCI controllers, Peter Maydell, 2020/02/13
- [PULL 32/46] hw/char/exynos4210_uart: Fix memleaks in exynos4210_uart_init, Peter Maydell, 2020/02/13
- [PULL 38/46] hw/arm/raspi: Trivial code movement, Peter Maydell, 2020/02/13
- [PULL 33/46] hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels, Peter Maydell, 2020/02/13
- [PULL 34/46] hw/arm/raspi: Correct the board descriptions, Peter Maydell, 2020/02/13
- [PULL 37/46] hw/arm/raspi: Extract the processor type from the board revision, Peter Maydell, 2020/02/13
- [PULL 35/46] hw/arm/raspi: Extract the version from the board revision, Peter Maydell, 2020/02/13
- [PULL 36/46] hw/arm/raspi: Extract the RAM size from the board revision, Peter Maydell, 2020/02/13
- [PULL 42/46] hw/arm/raspi: Set default RAM size to size encoded in board revision, Peter Maydell, 2020/02/13