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[PULL 46/46] target/arm: Implement ARMv8.1-VMID16 extension
From: |
Peter Maydell |
Subject: |
[PULL 46/46] target/arm: Implement ARMv8.1-VMID16 extension |
Date: |
Thu, 13 Feb 2020 14:41:45 +0000 |
The ARMv8.1-VMID16 extension extends the VMID from 8 bits to 16 bits:
* the ID_AA64MMFR1_EL1.VMIDBits field specifies whether the VMID is
8 or 16 bits
* the VMID field in VTTBR_EL2 is extended to 16 bits
* VTCR_EL2.VS lets the guest specify whether to use the full 16 bits,
or use the backwards-compatible 8 bits
For QEMU implementing this is trivial:
* we do not track VMIDs in TLB entries, so we never use the VMID field
* we treat any write to VTTBR_EL2, not just a change to the VMID field
bits, as a "possible VMID change" that causes us to throw away TLB
entries, so that code doesn't need changing
* we allow the guest to read/write the VTCR_EL2.VS bit already
So all that's missing is the ID register part: report that we support
VMID16 in our 'max' CPU.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/cpu64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1359564c554..f0d98bc79d1 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -674,6 +674,7 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);
t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1);
t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
+ t = FIELD_DP64(t, ID_AA64MMFR1, VMIDBITS, 2); /* VMID16 */
cpu->isar.id_aa64mmfr1 = t;
t = cpu->isar.id_aa64mmfr2;
--
2.20.1
- [PULL 37/46] hw/arm/raspi: Extract the processor type from the board revision, (continued)
- [PULL 37/46] hw/arm/raspi: Extract the processor type from the board revision, Peter Maydell, 2020/02/13
- [PULL 35/46] hw/arm/raspi: Extract the version from the board revision, Peter Maydell, 2020/02/13
- [PULL 36/46] hw/arm/raspi: Extract the RAM size from the board revision, Peter Maydell, 2020/02/13
- [PULL 42/46] hw/arm/raspi: Set default RAM size to size encoded in board revision, Peter Maydell, 2020/02/13
- [PULL 44/46] hw/arm/raspi: Use a unique raspi_machine_class_init() method, Peter Maydell, 2020/02/13
- [PULL 41/46] hw/arm/raspi: Let class_init() directly call raspi_machine_init(), Peter Maydell, 2020/02/13
- [PULL 43/46] hw/arm/raspi: Extract the board model from the board revision, Peter Maydell, 2020/02/13
- [PULL 45/46] hw/arm/raspi: Extract the cores count from the board revision, Peter Maydell, 2020/02/13
- [PULL 39/46] hw/arm/raspi: Make machines children of abstract RaspiMachineClass, Peter Maydell, 2020/02/13
- [PULL 40/46] hw/arm/raspi: Make board_rev a field of RaspiMachineClass, Peter Maydell, 2020/02/13
- [PULL 46/46] target/arm: Implement ARMv8.1-VMID16 extension,
Peter Maydell <=
- Re: [PULL 00/46] target-arm queue, Peter Maydell, 2020/02/14