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[PULL 06/33] cpu/arm11mpcore: Set number of GIC priority bits to 4
From: |
Peter Maydell |
Subject: |
[PULL 06/33] cpu/arm11mpcore: Set number of GIC priority bits to 4 |
Date: |
Fri, 28 Feb 2020 16:38:13 +0000 |
From: Sai Pavan Boddu <address@hidden>
The GIC built into the ARM11MPCore is always implemented with 4
priority bits; set the GIC property accordingly.
Signed-off-by: Sai Pavan Boddu <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Suggested-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <address@hidden>
---
hw/cpu/arm11mpcore.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 2e3e87cc1b3..ab9fadb67cb 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -15,6 +15,7 @@
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#define ARM11MPCORE_NUM_GIC_PRIORITY_BITS 4
static void mpcore_priv_set_irq(void *opaque, int irq, int level)
{
@@ -86,6 +87,10 @@ static void mpcore_priv_realize(DeviceState *dev, Error
**errp)
qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
+ qdev_prop_set_uint32(gicdev, "num-priority-bits",
+ ARM11MPCORE_NUM_GIC_PRIORITY_BITS);
+
+
object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);
--
2.20.1
- [PULL 00/33] target-arm queue, Peter Maydell, 2020/02/28
- [PULL 01/33] hw/arm: Use TYPE_PL011 to create serial port, Peter Maydell, 2020/02/28
- [PULL 02/33] target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfn, Peter Maydell, 2020/02/28
- [PULL 03/33] hw/arm/integratorcp: Map the audio codec controller, Peter Maydell, 2020/02/28
- [PULL 04/33] arm_gic: Mask the un-supported priority bits, Peter Maydell, 2020/02/28
- [PULL 08/33] target/arm: Rename isar_feature_aa32_fpdp_v2, Peter Maydell, 2020/02/28
- [PULL 06/33] cpu/arm11mpcore: Set number of GIC priority bits to 4,
Peter Maydell <=
- [PULL 07/33] target/arm: Add isar_feature_aa32_vfp_simd, Peter Maydell, 2020/02/28
- [PULL 09/33] target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3}, Peter Maydell, 2020/02/28
- [PULL 11/33] target/arm: Perform fpdp_v2 check first, Peter Maydell, 2020/02/28
- [PULL 12/33] target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3, Peter Maydell, 2020/02/28
- [PULL 13/33] target/arm: Add missing checks for fpsp_v2, Peter Maydell, 2020/02/28
- [PULL 14/33] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac, Peter Maydell, 2020/02/28
- [PULL 15/33] target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn, Peter Maydell, 2020/02/28
- [PULL 16/33] target/arm: Move VLLDM and VLSTM to vfp.decode, Peter Maydell, 2020/02/28
- [PULL 24/33] hw/usb/hcd-ehci-sysbus: Remove obsolete xlnx, ps7-usb class, Peter Maydell, 2020/02/28
- [PULL 29/33] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0, Peter Maydell, 2020/02/28