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[PULL 05/33] cpu/a9mpcore: Set number of GIC priority bits to 5
From: |
Peter Maydell |
Subject: |
[PULL 05/33] cpu/a9mpcore: Set number of GIC priority bits to 5 |
Date: |
Fri, 28 Feb 2020 16:38:12 +0000 |
From: Sai Pavan Boddu <address@hidden>
All A9 CPUs have a GIC with 5 bits of priority.
Signed-off-by: Sai Pavan Boddu <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Suggested-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/cpu/a9mpcore.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index 1f8bc8a196f..b4f6a7e8a54 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -16,6 +16,8 @@
#include "hw/qdev-properties.h"
#include "hw/core/cpu.h"
+#define A9_GIC_NUM_PRIORITY_BITS 5
+
static void a9mp_priv_set_irq(void *opaque, int irq, int level)
{
A9MPPrivState *s = (A9MPPrivState *)opaque;
@@ -68,6 +70,8 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp)
gicdev = DEVICE(&s->gic);
qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq);
+ qdev_prop_set_uint32(gicdev, "num-priority-bits",
+ A9_GIC_NUM_PRIORITY_BITS);
/* Make the GIC's TZ support match the CPUs. We assume that
* either all the CPUs have TZ, or none do.
--
2.20.1
- [PULL 13/33] target/arm: Add missing checks for fpsp_v2, (continued)
- [PULL 13/33] target/arm: Add missing checks for fpsp_v2, Peter Maydell, 2020/02/28
- [PULL 14/33] target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmac, Peter Maydell, 2020/02/28
- [PULL 15/33] target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insn, Peter Maydell, 2020/02/28
- [PULL 16/33] target/arm: Move VLLDM and VLSTM to vfp.decode, Peter Maydell, 2020/02/28
- [PULL 24/33] hw/usb/hcd-ehci-sysbus: Remove obsolete xlnx, ps7-usb class, Peter Maydell, 2020/02/28
- [PULL 29/33] target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0, Peter Maydell, 2020/02/28
- [PULL 10/33] target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp, Peter Maydell, 2020/02/28
- [PULL 18/33] linux-user/arm: Replace ARM_FEATURE_VFP* tests for HWCAP, Peter Maydell, 2020/02/28
- [PULL 23/33] hw/arm/xilinx_zynq: Fix USB port instantiation, Peter Maydell, 2020/02/28
- [PULL 30/33] target/arm: Implement v8.3-RCPC, Peter Maydell, 2020/02/28
- [PULL 05/33] cpu/a9mpcore: Set number of GIC priority bits to 5,
Peter Maydell <=
- [PULL 20/33] target/arm: Add formats for some vfp 2 and 3-register insns, Peter Maydell, 2020/02/28
- [PULL 22/33] target/arm: Split VMINMAXNM decode, Peter Maydell, 2020/02/28
- [PULL 25/33] tests/acceptance: Add a test for the N800 and N810 arm machines, Peter Maydell, 2020/02/28
- [PULL 26/33] tests/acceptance: Add a test for the integratorcp arm machine, Peter Maydell, 2020/02/28
- [PULL 17/33] target/arm: Move the vfp decodetree calls next to the base isa, Peter Maydell, 2020/02/28
- [PULL 21/33] target/arm: Split VFM decode, Peter Maydell, 2020/02/28
- [PULL 27/33] tests/acceptance: Extract boot_integratorcp() from test_integratorcp(), Peter Maydell, 2020/02/28
- [PULL 28/33] tests/acceptance/integratorcp: Verify Tux is displayed on framebuffer, Peter Maydell, 2020/02/28
- [PULL 33/33] hw/intc/arm_gic_kvm: Don't assume kernel can provide a GICv2, Peter Maydell, 2020/02/28
- [PULL 31/33] target/arm: Implement v8.4-RCPC, Peter Maydell, 2020/02/28