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[RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3
From: |
Taylor Simpson |
Subject: |
[RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3 |
Date: |
Fri, 28 Feb 2020 10:43:32 -0600 |
Helpers for store instructions
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/genptr_helpers.h | 77 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)
diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h
index c0e4c39..0e2d7b9 100644
--- a/target/hexagon/genptr_helpers.h
+++ b/target/hexagon/genptr_helpers.h
@@ -386,4 +386,81 @@ static inline void gen_store_conditional8(CPUHexagonState
*env,
tcg_temp_free(tmp);
}
+static inline void gen_store32(TCGv vaddr, TCGv src, int width, int slot)
+{
+ tcg_gen_mov_tl(hex_store_addr[slot], vaddr);
+ tcg_gen_movi_tl(hex_store_width[slot], width);
+ tcg_gen_mov_tl(hex_store_val32[slot], src);
+}
+
+static inline void gen_store1(TCGv_env cpu_env, TCGv vaddr, TCGv src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(slot);
+ gen_store32(vaddr, src, 1, slot);
+ tcg_temp_free(tmp);
+ ctx->ctx_store_width[slot] = 1;
+}
+
+static inline void gen_store1i(TCGv_env cpu_env, TCGv vaddr, int32_t src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(src);
+ gen_store1(cpu_env, vaddr, tmp, ctx, slot);
+ tcg_temp_free(tmp);
+}
+
+static inline void gen_store2(TCGv_env cpu_env, TCGv vaddr, TCGv src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(slot);
+ gen_store32(vaddr, src, 2, slot);
+ tcg_temp_free(tmp);
+ ctx->ctx_store_width[slot] = 2;
+}
+
+static inline void gen_store2i(TCGv_env cpu_env, TCGv vaddr, int32_t src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(src);
+ gen_store2(cpu_env, vaddr, tmp, ctx, slot);
+ tcg_temp_free(tmp);
+}
+
+static inline void gen_store4(TCGv_env cpu_env, TCGv vaddr, TCGv src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(slot);
+ gen_store32(vaddr, src, 4, slot);
+ tcg_temp_free(tmp);
+ ctx->ctx_store_width[slot] = 4;
+}
+
+static inline void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(src);
+ gen_store4(cpu_env, vaddr, tmp, ctx, slot);
+ tcg_temp_free(tmp);
+}
+
+static inline void gen_store8(TCGv_env cpu_env, TCGv vaddr, TCGv_i64 src,
+ DisasContext *ctx, int slot)
+{
+ TCGv tmp = tcg_const_tl(slot);
+ tcg_gen_mov_tl(hex_store_addr[slot], vaddr);
+ tcg_gen_movi_tl(hex_store_width[slot], 8);
+ tcg_gen_mov_i64(hex_store_val64[slot], src);
+ tcg_temp_free(tmp);
+ ctx->ctx_store_width[slot] = 8;
+}
+
+static inline void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src,
+ DisasContext *ctx, int slot)
+{
+ TCGv_i64 tmp = tcg_const_i64(src);
+ gen_store8(cpu_env, vaddr, tmp, ctx, slot);
+ tcg_temp_free_i64(tmp);
+}
+
#endif
--
2.7.4
- [RFC PATCH v2 58/67] Hexagon HVX import macro definitions, (continued)
- [RFC PATCH v2 58/67] Hexagon HVX import macro definitions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 60/67] Hexagon HVX instruction decoding, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 63/67] Hexagon HVX macros referenced in instruction semantics, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 39/67] Hexagon TCG generation - step 01, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 52/67] Hexagon Linux user emulation, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 56/67] Hexagon HVX import instruction encodings, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 46/67] Hexagon TCG generation - step 08, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 54/67] Hexagon - Add Hexagon Vector eXtensions (HVX) to core definition, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 30/67] Hexagon opcode data structures, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 61/67] Hexagon HVX instruction utility functions, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 36/67] Hexagon TCG generation helpers - step 3,
Taylor Simpson <=
- [RFC PATCH v2 35/67] Hexagon TCG generation helpers - step 2, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 45/67] Hexagon TCG generation - step 07, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 50/67] Hexagon TCG generation - step 12, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 42/67] Hexagon TCG generation - step 04, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 40/67] Hexagon TCG generation - step 02, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 34/67] Hexagon TCG generation helpers - step 1, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 43/67] Hexagon TCG generation - step 05, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 49/67] Hexagon TCG generation - step 11, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 65/67] Hexagon HVX TCG generation, Taylor Simpson, 2020/02/28
- [RFC PATCH v2 66/67] Hexagon HVX translation, Taylor Simpson, 2020/02/28