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Re: [PATCH v2 2/3] riscv/sifive_u: Add a serial property to the sifive_u


From: Bin Meng
Subject: Re: [PATCH v2 2/3] riscv/sifive_u: Add a serial property to the sifive_u SoC
Date: Thu, 5 Mar 2020 17:26:00 +0800

On Thu, Mar 5, 2020 at 7:11 AM Alistair Francis
<address@hidden> wrote:
>
> At present the board serial number is hard-coded to 1, and passed
> to OTP model during initialization. Firmware (FSBL, U-Boot) uses
> the serial number to generate a unique MAC address for the on-chip
> ethernet controller. When multiple QEMU 'sifive_u' instances are
> created and connected to the same subnet, they all have the same
> MAC address hence it creates a unusable network.
>
> A new "serial" property is introduced to the sifive_u SoC to specify
> the board serial number. When not given, the default serial number
> 1 is used.
>
> Suggested-by: Bin Meng <address@hidden>
> Signed-off-by: Alistair Francis <address@hidden>
> ---
>  hw/riscv/sifive_u.c         | 8 +++++++-
>  include/hw/riscv/sifive_u.h | 2 ++
>  2 files changed, 9 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng <address@hidden>
Tested-by: Bin Meng <address@hidden>



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