Re: [PATCH v5 59/60] target/riscv: vector compress instruction

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Re: [PATCH v5 59/60] target/riscv: vector compress instruction

From:	Richard Henderson
Subject:	Re: [PATCH v5 59/60] target/riscv: vector compress instruction
Date:	Sun, 15 Mar 2020 00:34:38 -0700
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

[ The patch didn't make it to the list, so reviewing

https://github.com/romanheros/qemu/commit/f46b8c8bbbf0acd78746a49fe712306d7c05c7e6
]

Reviewed-by: Richard Henderson <address@hidden>


r~

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Re: [PATCH v5 57/60] target/riscv: vector slide instructions, (continued)
- [PATCH v5 58/60] target/riscv: vector register gather instruction, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 58/60] target/riscv: vector register gather instruction, Richard Henderson, 2020/03/15
- [PATCH v5 59/60] target/riscv: vector compress instruction, LIU Zhiwei, 2020/03/12
- [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, LIU Zhiwei, 2020/03/12
  - Re: [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, Alistair Francis, 2020/03/13
    - Re: [PATCH v5 60/60] target/riscv: configure and turn on vector extension from command line, LIU Zhiwei, 2020/03/13
- Re: [PATCH v5 00/60] target/riscv: support vector extension v0.7.1, no-reply, 2020/03/12
- Re: [PATCH v5 35/60] target/riscv: vector floating-point square-root instruction, Richard Henderson, 2020/03/15
- Re: [PATCH v5 51/60] target/riscv: set-X-first mask bit, Richard Henderson, 2020/03/15
- Re: [PATCH v5 59/60] target/riscv: vector compress instruction, Richard Henderson <=

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