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[Bug 1859291] Re: RISC-V incorrect exception generated
From: |
Alistair Francis |
Subject: |
[Bug 1859291] Re: RISC-V incorrect exception generated |
Date: |
Tue, 17 Mar 2020 20:25:00 -0000 |
I don't see the problem still.
When an ecall is generated the riscv_cpu_do_interrupt() function will
translate it to the correct call. We run Linux user space inside QEMU,
so this is generally working. Can you please attach source code and
binaries (or link to it) to reproduce the issue. You also need to
include the command line arguments you are using.
The main question is what is different to what you are running and Linux
user space?
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https://bugs.launchpad.net/bugs/1859291
Title:
RISC-V incorrect exception generated
Status in QEMU:
New
Bug description:
When using 'ecall' from supervisor mode, user exception is raised
instead of supervisor exception. The problem is located under
'target/riscv/insn_trans/trans_priviledged.inc.c' in function 'static
bool trans_ecall(DisasContext *ctx, arg_ecall *a)'. Best regards,
Serge Teodori
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