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Re: [PULL 22/36] hw/arm/allwinner-h3: add SDRAM controller device

From: Peter Maydell
Subject: Re: [PULL 22/36] hw/arm/allwinner-h3: add SDRAM controller device
Date: Sun, 22 Mar 2020 21:17:50 +0000

On Sun, 22 Mar 2020 at 20:23, Niek Linnenbank <address@hidden> wrote:
> On Fri, Mar 20, 2020 at 4:46 PM Peter Maydell <address@hidden> wrote:
>> In this calculation we do the multiply as a signed 32-bit operation,
>> which then gets sign-extended to 64 bits for the addition; that
>> means that if the multiply result is greater than 0x7fffffff then
>> the upper bits of the result will all be 1s. Is this a "can't happen"
>> situation, or should we be using "1ULL" to force a 64-bit multiply?

> However in theory, the Control register can indeed be written with larger 
> page_size values.
> So to be safe, I'll just make a small patch to replace the 1 with 1UL, thanks!

"1ULL", not "1UL". The former guarantees you a 64-bit constant,
the latter does not: it depends on the size of 'long' on the host.
(Usually using "UL" suffixes in QEMU is a bug, because either 32
bits was fine, in which case "U" or no suffix would have done,
or you really needed 64 bits, in which case you need "ULL". There
are some exceptions where the code really is working with "long"

-- PMM

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