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Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructi


From: Richard Henderson
Subject: Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructions
Date: Fri, 27 Mar 2020 20:23:27 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

On 3/17/20 8:06 AM, LIU Zhiwei wrote:
> +    for (i = 0; i < vl; i++) {                            \
> +        if (!vm && !vext_elem_mask(v0, mlen, i)) {        \
> +            ETYPE s2 = *((ETYPE *)vs2 + H(i));            \
> +            *((ETYPE *)vd + H1(i)) = s2;                  \

H1 should be H.

> +        } else {                                          \
> +            *((ETYPE *)vd + H(i)) = (ETYPE)s1;            \
> +        }                                                 \

You can also hoist the s2 dereference out of the IF, and let the assignment be
unconditional.

  *((ETYPE *)vd + H(i))
    = (!vm && !vext_elem_mask(v0, mlen, i) ? s2 : s1);


r~



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