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[PATCH v1 2/6] target/microblaze: Add the ill-opcode-exception property
From: |
Edgar E. Iglesias |
Subject: |
[PATCH v1 2/6] target/microblaze: Add the ill-opcode-exception property |
Date: |
Fri, 17 Apr 2020 21:10:18 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Add the ill-opcode-exception property to control if illegal
instructions will raise exceptions.
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/cpu.c | 4 ++++
target/microblaze/cpu.h | 1 +
target/microblaze/translate.c | 2 +-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 1044120702..36c20d9724 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -207,6 +207,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
PVR2_DOPB_BUS_EXC_MASK : 0) |
(cpu->cfg.iopb_bus_exception ?
PVR2_IOPB_BUS_EXC_MASK : 0) |
+ (cpu->cfg.illegal_opcode_exception ?
+ PVR2_ILL_OPCODE_EXC_MASK : 0) |
(cpu->cfg.opcode_0_illegal ?
PVR2_OPCODE_0x0_ILL_MASK : 0);
@@ -276,6 +278,8 @@ static Property mb_properties[] = {
/* Enables bus exceptions on failed instruction fetches. */
DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
cfg.iopb_bus_exception, false),
+ DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
+ cfg.illegal_opcode_exception, false),
DEFINE_PROP_BOOL("opcode-0x0-illegal", MicroBlazeCPU,
cfg.opcode_0_illegal, false),
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index d51587b342..71d7317a58 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -303,6 +303,7 @@ struct MicroBlazeCPU {
bool endi;
bool dopb_bus_exception;
bool iopb_bus_exception;
+ bool illegal_opcode_exception;
bool opcode_0_illegal;
char *version;
uint8_t pvr;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 222632b670..b4a78551ef 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -185,7 +185,7 @@ static void write_carryi(DisasContext *dc, bool carry)
static bool trap_illegal(DisasContext *dc, bool cond)
{
if (cond && (dc->tb_flags & MSR_EE_FLAG)
- && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) {
+ && dc->cpu->cfg.illegal_opcode_exception) {
tcg_gen_movi_i64(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
t_gen_raise_exception(dc, EXCP_HW_EXCP);
}
--
2.20.1