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[PATCH RFC v2 1/3] target/arm: Implement SVE2 AESMC, AESIMC


From: Stephen Long
Subject: [PATCH RFC v2 1/3] target/arm: Implement SVE2 AESMC, AESIMC
Date: Mon, 27 Apr 2020 08:29:02 -0700

Signed-off-by: Stephen Long <address@hidden>
---
 target/arm/helper-sve.h    |  3 +++
 target/arm/sve.decode      | 10 ++++++++++
 target/arm/sve_helper.c    | 15 +++++++++++++++
 target/arm/translate-sve.c | 18 ++++++++++++++++++
 4 files changed, 46 insertions(+)

diff --git a/target/arm/helper-sve.h b/target/arm/helper-sve.h
index 51ad60e5c3..340fe07801 100644
--- a/target/arm/helper-sve.h
+++ b/target/arm/helper-sve.h
@@ -2690,3 +2690,6 @@ DEF_HELPER_FLAGS_5(sve2_sqrdcmlah_zzzz_d, TCG_CALL_NO_RWG,
 
 DEF_HELPER_FLAGS_6(fmmla_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, 
i32)
 DEF_HELPER_FLAGS_6(fmmla_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, ptr, 
i32)
+
+DEF_HELPER_FLAGS_3(sve2_aesmc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
+DEF_HELPER_FLAGS_3(sve2_aesimc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index de3768c24a..f58eb04d11 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -92,6 +92,10 @@
 # Named instruction formats.  These are generally used to
 # reduce the amount of duplication between instruction patterns.
 
+# One operand with unused vector element size
+@rdn_e0         ........ .. ........... . ..... rd:5 \
+                &rr_esz rn=%reg_movprfx esz=0
+
 # Two operand with unused vector element size
 @pd_pn_e0       ........ ........ ....... rn:4 . rd:4           &rr_esz esz=0
 
@@ -1419,3 +1423,9 @@ STNT1_zprz      1110010 .. 00 ..... 001 ... ..... ..... \
 # SVE2 32-bit scatter non-temporal store (vector plus scalar)
 STNT1_zprz      1110010 .. 10 ..... 001 ... ..... ..... \
                 @rprr_scatter_store xs=0 esz=2 scale=0
+
+#### SVE2 Crypto Extensions
+
+## SVE2 crypto unary operations
+AESMC           01000101 00 10000011100 0 00000 .....   @rdn_e0
+AESIMC          01000101 00 10000011100 1 00000 .....   @rdn_e0
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index cd5c6f7fb0..5c3dee048d 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -7516,3 +7516,18 @@ void HELPER(fmmla_d)(void *vd, void *va, void *vn, void 
*vm,
         d[3] = float64_add(a[3], float64_add(p0, p1, status), status);
     }
 }
+
+#define DO_SVE2_AES_CRYPTO(NAME, FN)                            \
+void HELPER(NAME)(void *vd, void *vn, uint32_t desc)            \
+{                                                               \
+    intptr_t i, opr_sz = simd_oprsz(desc);                      \
+    intptr_t decrypt = simd_data(desc);                         \
+    for (i = 0; i < opr_sz; i += 16) {                          \
+        HELPER(FN)(vd + i, vn + i, decrypt);                    \
+    }                                                           \
+}
+
+DO_SVE2_AES_CRYPTO(sve2_aesmc, crypto_aesmc);
+DO_SVE2_AES_CRYPTO(sve2_aesimc, crypto_aesmc);
+
+#undef DO_SVE2_AES_CRYPTO
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 86c3d0ed11..f70b7f44e3 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -7956,3 +7956,21 @@ static bool trans_SQRDCMLAH_zzzz(DisasContext *s, 
arg_CMLA_zzzz *a)
     };
     return do_sve2_zzzz_fn(s, a->rd, a->rn, a->rm, a->ra, fns[a->esz], a->rot);
 }
+
+#define DO_SVE2_AES_CRYPTO(NAME, name, DECRYPT)                         \
+static bool trans_##NAME(DisasContext *s, arg_rr_esz *a)                \
+{                                                                       \
+    if (!dc_isar_feature(aa64_sve2_aes, s)) {                           \
+        return false;                                                   \
+    }                                                                   \
+    if (sve_access_check(s)) {                                          \
+        unsigned vsz = vec_full_reg_size(s);                            \
+        tcg_gen_gvec_2_ool(vec_full_reg_offset(s, a->rd),               \
+                           vec_full_reg_offset(s, a->rn),               \
+                           vsz, vsz, DECRYPT, gen_helper_sve2_##name);  \
+    }                                                                   \
+    return true;                                                        \
+}
+
+DO_SVE2_AES_CRYPTO(AESMC, aesmc, 0)
+DO_SVE2_AES_CRYPTO(AESIMC, aesimc, 1)
-- 
2.17.1




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