[PATCH v3 7/9] target/arm: Implement SVE2 crypto unary operations

[Richard Henderson]

Signed-off-by: Richard Henderson <address@hidden>
---
 target/arm/sve.decode      |  6 ++++++
 target/arm/translate-sve.c | 14 ++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index b73b64c3f2..04985d2bb8 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -1551,3 +1551,9 @@ STNT1_zprz      1110010 .. 00 ..... 001 ... ..... ..... \
 # SVE2 32-bit scatter non-temporal store (vector plus scalar)
 STNT1_zprz      1110010 .. 10 ..... 001 ... ..... ..... \
                 @rprr_scatter_store xs=0 esz=2 scale=0
+
+### SVE2 Crypto Extensions
+
+# SVE2 crypto unary operations
+# AESMC and AESIMC
+AESMC           01000101 00 10000011100 decrypt:1 00000 rd:5
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 413000df3b..44dd1fe2b0 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -8174,3 +8174,17 @@ static bool trans_USDOT_zzzz(DisasContext *s, 
arg_USDOT_zzzz *a)
     }
     return true;
 }
+
+static bool trans_AESMC(DisasContext *s, arg_AESMC *a)
+{
+    if (!dc_isar_feature(aa64_sve2_aes, s)) {
+        return false;
+    }
+    if (sve_access_check(s)) {
+        unsigned vsz = vec_full_reg_size(s);
+        unsigned rd = vec_full_reg_offset(s, a->rd);
+        tcg_gen_gvec_2_ool(rd, rd, vsz, vsz, a->decrypt,
+                           gen_helper_crypto_aesmc);
+    }
+    return true;
+}
-- 
2.20.1