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[PULL v1 0/6] Xilinx queue 2020-04-30
From: |
Edgar E. Iglesias |
Subject: |
[PULL v1 0/6] Xilinx queue 2020-04-30 |
Date: |
Thu, 30 Apr 2020 12:19:43 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
The following changes since commit 648db19685b7030aa558a4ddbd3a8e53d8c9a062:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-04-29' into
staging (2020-04-29 15:07:33 +0100)
are available in the Git repository at:
address@hidden:edgarigl/qemu.git
tags/edgar/xilinx-next-2020-04-30.for-upstream
for you to fetch changes up to 3ed43b5031ed2d7ef501bb81b87caed960218461:
target/microblaze: Add the pvr-user2 property (2020-04-30 12:11:03 +0200)
----------------------------------------------------------------
For upstream
----------------------------------------------------------------
Edgar E. Iglesias (6):
target/microblaze: Add the opcode-0x0-illegal CPU property
target/microblaze: Add the ill-opcode-exception property
target/microblaze: Add the div-zero-exception property
target/microblaze: Add the unaligned-exceptions property
target/microblaze: Add the pvr-user1 property
target/microblaze: Add the pvr-user2 property
target/microblaze/cpu.h | 6 ++++++
target/microblaze/cpu.c | 24 ++++++++++++++++++++++--
target/microblaze/op_helper.c | 5 +++--
target/microblaze/translate.c | 8 ++++----
4 files changed, 35 insertions(+), 8 deletions(-)
Edgar E. Iglesias (6):
target/microblaze: Add the opcode-0x0-illegal CPU property
target/microblaze: Add the ill-opcode-exception property
target/microblaze: Add the div-zero-exception property
target/microblaze: Add the unaligned-exceptions property
target/microblaze: Add the pvr-user1 property
target/microblaze: Add the pvr-user2 property
target/microblaze/cpu.h | 6 ++++++
target/microblaze/cpu.c | 24 ++++++++++++++++++++++--
target/microblaze/op_helper.c | 5 +++--
target/microblaze/translate.c | 8 ++++----
4 files changed, 35 insertions(+), 8 deletions(-)
--
2.20.1
- [PULL v1 0/6] Xilinx queue 2020-04-30,
Edgar E. Iglesias <=
- [PULL v1 1/6] target/microblaze: Add the opcode-0x0-illegal CPU property, Edgar E. Iglesias, 2020/04/30
- [PULL v1 3/6] target/microblaze: Add the div-zero-exception property, Edgar E. Iglesias, 2020/04/30
- [PULL v1 2/6] target/microblaze: Add the ill-opcode-exception property, Edgar E. Iglesias, 2020/04/30
- [PULL v1 4/6] target/microblaze: Add the unaligned-exceptions property, Edgar E. Iglesias, 2020/04/30
- [PULL v1 6/6] target/microblaze: Add the pvr-user2 property, Edgar E. Iglesias, 2020/04/30
- [PULL v1 5/6] target/microblaze: Add the pvr-user1 property, Edgar E. Iglesias, 2020/04/30
- Re: [PULL v1 0/6] Xilinx queue 2020-04-30, Peter Maydell, 2020/04/30