[PATCH 00/36] target/arm: Convert Neon to decodetree (part 1)

[Peter Maydell]

This patchseries starts in on the job of converting the Arm
Neon decoder to decodetree.

Neon insns come in three major parts:
 * the 'v8.0-and-later' extensions
 * the 'loads and stores' group
 * the 'data processing' group

This patchset converts all of the v8.0-and-later extensions
and the loads-and-stores, plus the "3-registers-same" subgroup
of the data-processing insns.

I'm working on the rest of the dp insns, but this seems like
a pretty large chunk of conversion patches to start with.

thanks
-- PMM

Peter Maydell (36):
  target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check
  target/arm: Don't allow Thumb Neon insns without FEATURE_NEON
  target/arm: Add stubs for AArch32 Neon decodetree
  target/arm: Convert VCMLA (vector) to decodetree
  target/arm: Convert VCADD (vector) to decodetree
  target/arm: Convert V[US]DOT (vector) to decodetree
  target/arm: Convert VFM[AS]L (vector) to decodetree
  target/arm: Convert VCMLA (scalar) to decodetree
  target/arm: Convert V[US]DOT (scalar) to decodetree
  target/arm: Convert VFM[AS]L (scalar) to decodetree
  target/arm: Convert Neon load/store multiple structures to decodetree
  target/arm: Convert Neon 'load single structure to all lanes' to
    decodetree
  target/arm: Convert Neon 'load/store single structure' to decodetree
  target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree
  target/arm: Convert Neon 3-reg-same logic ops to decodetree
  target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree
  target/arm: Convert Neon 3-reg-same comparisons to decodetree
  target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree
  target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to
    decodetree
  target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree
  target/arm: Convert Neon 3-reg-same SHA to decodetree
  target/arm: Move gen_ function typedefs to translate.h
  target/arm: Convert Neon 64-bit element 3-reg-same insns
  target/arm: Convert Neon VHADD 3-reg-same insns
  target/arm: Convert Neon VRHADD, VHSUB, VABD 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VABA 3-reg-same to decodetree
  target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree
  target/arm: Convert Neon VPADD 3-reg-same insns to decodetree
  target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree
  target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to
    decodetree
  target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to
    decodetree
  target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to
    decodetree
  target/arm: Convert Neon 3-reg-same compare insns to decodetree
  target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to
    decodetree
  target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree

 target/arm/Makefile.objs        |   18 +
 target/arm/translate-a64.h      |    9 -
 target/arm/translate.h          |   26 +
 target/arm/translate-a64.c      |   17 -
 target/arm/translate-neon.inc.c | 1577 +++++++++++++++++++++++++++++++
 target/arm/translate-vfp.inc.c  |    6 -
 target/arm/translate.c          | 1200 +----------------------
 target/arm/neon-dp.decode       |  186 ++++
 target/arm/neon-ls.decode       |   52 +
 target/arm/neon-shared.decode   |   66 ++
 10 files changed, 1967 insertions(+), 1190 deletions(-)
 create mode 100644 target/arm/translate-neon.inc.c
 create mode 100644 target/arm/neon-dp.decode
 create mode 100644 target/arm/neon-ls.decode
 create mode 100644 target/arm/neon-shared.decode

-- 
2.20.1