[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2
From: |
Richard Henderson |
Subject: |
[PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2 |
Date: |
Fri, 8 May 2020 11:26:14 -0700 |
There are several ways we can expand a vector dup of a 64-bit
element on a 32-bit host.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 18ebcc98f6..e8fe2d580b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3908,6 +3908,91 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp
*op)
}
}
+static void tcg_reg_alloc_dup2(TCGContext *s, const TCGOp *op)
+{
+ const TCGLifeData arg_life = op->life;
+ TCGTemp *ots, *itsl, *itsh;
+ TCGType vtype = TCGOP_VECL(op) + TCG_TYPE_V64;
+
+ /* This opcode is only valid for 32-bit hosts, for 64-bit elements. */
+ tcg_debug_assert(TCG_TARGET_REG_BITS == 32);
+ tcg_debug_assert(TCGOP_VECE(op) == MO_64);
+
+ ots = arg_temp(op->args[0]);
+ itsl = arg_temp(op->args[1]);
+ itsh = arg_temp(op->args[2]);
+
+ /* ENV should not be modified. */
+ tcg_debug_assert(!temp_readonly(ots));
+
+ /* Allocate the output register now. */
+ if (ots->val_type != TEMP_VAL_REG) {
+ TCGRegSet allocated_regs = s->reserved_regs;
+ TCGRegSet dup_out_regs =
+ tcg_op_defs[INDEX_op_dup_vec].args_ct[0].u.regs;
+
+ /* Make sure to not spill the input registers. */
+ if (!IS_DEAD_ARG(1) && itsl->val_type == TEMP_VAL_REG) {
+ tcg_regset_set_reg(allocated_regs, itsl->reg);
+ }
+ if (!IS_DEAD_ARG(2) && itsh->val_type == TEMP_VAL_REG) {
+ tcg_regset_set_reg(allocated_regs, itsh->reg);
+ }
+
+ ots->reg = tcg_reg_alloc(s, dup_out_regs, allocated_regs,
+ op->output_pref[0], ots->indirect_base);
+ ots->val_type = TEMP_VAL_REG;
+ ots->mem_coherent = 0;
+ s->reg_to_temp[ots->reg] = ots;
+ }
+
+ /* Promote dup2 of immediates to dupi_vec. */
+ if (itsl->val_type == TEMP_VAL_CONST &&
+ itsh->val_type == TEMP_VAL_CONST) {
+ tcg_out_dupi_vec(s, vtype, ots->reg,
+ (uint32_t)itsl->val | ((uint64_t)itsh->val << 32));
+ goto done;
+ }
+
+ /* If the two inputs form one 64-bit value, try dupm_vec. */
+ if (itsl + 1 == itsh &&
+ itsl->base_type == TCG_TYPE_I64 &&
+ itsh->base_type == TCG_TYPE_I64) {
+ if (!itsl->mem_coherent) {
+ temp_sync(s, itsl, s->reserved_regs, 0, 0);
+ }
+ if (!itsl->mem_coherent) {
+ temp_sync(s, itsl, s->reserved_regs, 0, 0);
+ }
+#ifdef HOST_WORDS_BIGENDIAN
+ TCGTemp *its = itsh;
+#else
+ TCGTemp *its = itsl;
+#endif
+ if (tcg_out_dupm_vec(s, vtype, MO_64, ots->reg,
+ its->mem_base->reg, its->mem_offset)) {
+ goto done;
+ }
+ }
+
+ /* Fall back to generic expansion. */
+ tcg_reg_alloc_op(s, op);
+ return;
+
+ done:
+ if (IS_DEAD_ARG(1)) {
+ temp_dead(s, itsl);
+ }
+ if (IS_DEAD_ARG(2)) {
+ temp_dead(s, itsh);
+ }
+ if (NEED_SYNC_ARG(0)) {
+ temp_sync(s, ots, s->reserved_regs, 0, IS_DEAD_ARG(0));
+ } else if (IS_DEAD_ARG(0)) {
+ temp_dead(s, ots);
+ }
+}
+
#ifdef TCG_TARGET_STACK_GROWSUP
#define STACK_DIR(x) (-(x))
#else
@@ -4299,6 +4384,9 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
case INDEX_op_dup_vec:
tcg_reg_alloc_dup(s, op);
break;
+ case INDEX_op_dup2_vec:
+ tcg_reg_alloc_dup2(s, op);
+ break;
case INDEX_op_insn_start:
if (num_insns >= 0) {
size_t off = tcg_current_code_size(s);
--
2.20.1
- [PATCH v4 08/19] tcg: Use tcg_constant_{i32,i64} with tcg plugins, (continued)
- [PATCH v4 08/19] tcg: Use tcg_constant_{i32,i64} with tcg plugins, Richard Henderson, 2020/05/08
- [PATCH v4 09/19] tcg: Rename struct tcg_temp_info to TempOptInfo, Richard Henderson, 2020/05/08
- [PATCH v4 10/19] tcg/optimize: Improve find_better_copy, Richard Henderson, 2020/05/08
- [PATCH v4 11/19] tcg/optimize: Adjust TempOptInfo allocation, Richard Henderson, 2020/05/08
- [PATCH v4 12/19] tcg/optimize: Use tcg_constant_internal with constant folding, Richard Henderson, 2020/05/08
- [PATCH v4 14/19] tcg: Remove movi and dupi opcodes, Richard Henderson, 2020/05/08
- [PATCH v4 13/19] tcg/tci: Add special tci_movi_{i32,i64} opcodes, Richard Henderson, 2020/05/08
- [PATCH v4 15/19] tcg: Use tcg_out_dupi_vec from temp_load, Richard Henderson, 2020/05/08
- [PATCH v4 16/19] tcg: Increase tcg_out_dupi_vec immediate to int64_t, Richard Henderson, 2020/05/08
- [PATCH v4 18/19] tcg/i386: Use tcg_constant_vec with tcg vec expanders, Richard Henderson, 2020/05/08
- [PATCH v4 17/19] tcg: Add tcg_reg_alloc_dup2,
Richard Henderson <=
- [PATCH v4 19/19] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec, Richard Henderson, 2020/05/08