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[PULL 37/45] target/arm: Convert Neon VPADD 3-reg-same insns to decodetr
From: |
Peter Maydell |
Subject: |
[PULL 37/45] target/arm: Convert Neon VPADD 3-reg-same insns to decodetree |
Date: |
Thu, 14 May 2020 15:21:30 +0100 |
Convert the Neon integer VPADD 3-reg-same insns to decodetree. These
are 'pairwise' operations. (Note that VQRDMLAH, which shares the
same primary opcode but has U=1, has already been converted.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/neon-dp.decode | 2 ++
target/arm/translate-neon.inc.c | 2 ++
target/arm/translate.c | 19 +------------------
3 files changed, 5 insertions(+), 18 deletions(-)
diff --git a/target/arm/neon-dp.decode b/target/arm/neon-dp.decode
index 2edcaba9f85..3659fb036c7 100644
--- a/target/arm/neon-dp.decode
+++ b/target/arm/neon-dp.decode
@@ -152,6 +152,8 @@ VPMAX_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 0
.... @3same_q0
VPMIN_S_3s 1111 001 0 0 . .. .... .... 1010 . . . 1 .... @3same_q0
VPMIN_U_3s 1111 001 1 0 . .. .... .... 1010 . . . 1 .... @3same_q0
+VPADD_3s 1111 001 0 0 . .. .... .... 1011 . . . 1 .... @3same_q0
+
VQRDMLAH_3s 1111 001 1 0 . .. .... .... 1011 ... 1 .... @3same
SHA1_3s 1111 001 0 0 . optype:2 .... .... 1100 . 1 . 0 .... \
diff --git a/target/arm/translate-neon.inc.c b/target/arm/translate-neon.inc.c
index 7db6b856598..e0137364075 100644
--- a/target/arm/translate-neon.inc.c
+++ b/target/arm/translate-neon.inc.c
@@ -990,8 +990,10 @@ static bool do_3same_pair(DisasContext *s, arg_3same *a,
NeonGenTwoOpFn *fn)
#define gen_helper_neon_pmax_u32 tcg_gen_umax_i32
#define gen_helper_neon_pmin_s32 tcg_gen_smin_i32
#define gen_helper_neon_pmin_u32 tcg_gen_umin_i32
+#define gen_helper_neon_padd_u32 tcg_gen_add_i32
DO_3SAME_PAIR(VPMAX_S, pmax_s)
DO_3SAME_PAIR(VPMIN_S, pmin_s)
DO_3SAME_PAIR(VPMAX_U, pmax_u)
DO_3SAME_PAIR(VPMIN_U, pmin_u)
+DO_3SAME_PAIR(VPADD, padd_u)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 82be4d40282..ce30417014d 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5397,13 +5397,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
return 1;
}
switch (op) {
- case NEON_3R_VPADD_VQRDMLAH:
- if (!u) {
- break; /* VPADD */
- }
- /* VQRDMLAH : handled by decodetree */
- return 1;
-
case NEON_3R_VFM_VQRDMLSH:
if (!u) {
/* VFM, VFMS */
@@ -5438,6 +5431,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t
insn)
case NEON_3R_VQRSHL:
case NEON_3R_VPMAX:
case NEON_3R_VPMIN:
+ case NEON_3R_VPADD_VQRDMLAH:
/* Already handled by decodetree */
return 1;
}
@@ -5448,9 +5442,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t
insn)
}
pairwise = 0;
switch (op) {
- case NEON_3R_VPADD_VQRDMLAH:
- pairwise = 1;
- break;
case NEON_3R_FLOAT_ARITH:
pairwise = (u && size < 2); /* if VPADD (float) */
break;
@@ -5528,14 +5519,6 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
}
}
break;
- case NEON_3R_VPADD_VQRDMLAH:
- switch (size) {
- case 0: gen_helper_neon_padd_u8(tmp, tmp, tmp2); break;
- case 1: gen_helper_neon_padd_u16(tmp, tmp, tmp2); break;
- case 2: tcg_gen_add_i32(tmp, tmp, tmp2); break;
- default: abort();
- }
- break;
case NEON_3R_FLOAT_ARITH: /* Floating point arithmetic. */
{
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
--
2.20.1
- [PULL 19/45] acpi: nvdimm: change NVDIMM_UUID_LE to a common macro, (continued)
- [PULL 19/45] acpi: nvdimm: change NVDIMM_UUID_LE to a common macro, Peter Maydell, 2020/05/14
- [PULL 22/45] ACPI: Build related register address fields via hardware error fw_cfg blob, Peter Maydell, 2020/05/14
- [PULL 28/45] MAINTAINERS: Add ACPI/HEST/GHES entries, Peter Maydell, 2020/05/14
- [PULL 26/45] ACPI: Record Generic Error Status Block(GESB) table, Peter Maydell, 2020/05/14
- [PULL 29/45] target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree, Peter Maydell, 2020/05/14
- [PULL 31/45] target/arm: Convert Neon 64-bit element 3-reg-same insns, Peter Maydell, 2020/05/14
- [PULL 33/45] target/arm: Convert Neon VABA/VABD 3-reg-same to decodetree, Peter Maydell, 2020/05/14
- [PULL 34/45] target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 35/45] target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 32/45] target/arm: Convert Neon VHADD 3-reg-same insns, Peter Maydell, 2020/05/14
- [PULL 37/45] target/arm: Convert Neon VPADD 3-reg-same insns to decodetree,
Peter Maydell <=
- [PULL 38/45] target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree, Peter Maydell, 2020/05/14
- [PULL 39/45] target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 36/45] target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 41/45] target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 40/45] target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 42/45] target/arm: Convert Neon 3-reg-same compare insns to decodetree, Peter Maydell, 2020/05/14
- [PULL 43/45] target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual place, Peter Maydell, 2020/05/14
- [PULL 44/45] target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree, Peter Maydell, 2020/05/14
- [PULL 45/45] target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree, Peter Maydell, 2020/05/14
- Re: [PULL 00/45] target-arm queue, Peter Maydell, 2020/05/14