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From: | LIU Zhiwei |
Subject: | Re: [RFC PATCH 0/8] RISCV risu porting |
Date: | Tue, 19 May 2020 17:44:07 +0800 |
User-agent: | Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
Yes. I should add a "--xlen" parameter to specify the general register length in risugen_riscv.pm.On 4/30/20 12:21 AM, LIU Zhiwei wrote:It's some difficult when I try to support RV32, because it's very similiar to RV64, so I can't make two .risu files like arm.risu and aarch64.risu.You could a command-line parameter, like --be or --sve for this.
LB RV32_64 imm:12 rs1:5 000 rd:5 0000011For RV64 only instructions:
LD RV64 imm:12 rs1:5 011 rd:5 0000011So I can generate RV32 instructions through --pattern '*.RV32.*', and the RV64 instructions through --pattern '.*RV64.*'.
r~
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