Re: [PATCH 8/9] ppc/pnv: Add model for POWER9 PHB5 PCIe Host bridge

[Greg Kurz]

I guess you mean POWER10 ?

On Wed, 13 May 2020 17:11:08 +0200
Cédric Le Goater <address@hidden> wrote:

> PHB4 and PHB5 are very similar. Use the PHB4 models with some minor
> adjustements in a subclass for P10.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
>  include/hw/pci-host/pnv_phb4.h |  11 ++++
>  include/hw/ppc/pnv.h           |   3 +
>  include/hw/ppc/pnv_xscom.h     |   6 ++
>  hw/pci-host/pnv_phb4_pec.c     |  44 ++++++++++++++
>  hw/ppc/pnv.c                   | 101 +++++++++++++++++++++++++++++++++
>  5 files changed, 165 insertions(+)
> 
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index c882bfd0aa23..ea3810f74066 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -227,4 +227,15 @@ typedef struct PnvPhb4PecClass {
>      int stk_compat_size;
>  } PnvPhb4PecClass;
>  
> +/*
> + * POWER10 definitions
> + */
> +
> +#define PNV_PHB5_VERSION           0x000000a500000001ull
> +#define PNV_PHB5_DEVICE_ID         0x0652
> +
> +#define TYPE_PNV_PHB5_PEC "pnv-phb5-pec"
> +#define PNV_PHB5_PEC(obj) \
> +    OBJECT_CHECK(PnvPhb4PecState, (obj), TYPE_PNV_PHB5_PEC)
> +
>  #endif /* PCI_HOST_PNV_PHB4_H */
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index 86bfa2107a8c..516229a51e7b 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -127,6 +127,9 @@ typedef struct Pnv10Chip {
>      uint32_t     nr_quads;
>      PnvQuad      *quads;
>  
> +#define PNV10_CHIP_MAX_PEC 2
> +    PnvPhb4PecState pecs[PNV10_CHIP_MAX_PEC];
> +
>  } Pnv10Chip;
>  
>  #define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
> index f26c5217764d..433c7b878af4 100644
> --- a/include/hw/ppc/pnv_xscom.h
> +++ b/include/hw/ppc/pnv_xscom.h
> @@ -139,6 +139,12 @@ typedef struct PnvXScomInterfaceClass {
>  #define PNV10_XSCOM_XIVE2_BASE     0x2010800
>  #define PNV10_XSCOM_XIVE2_SIZE     0x400
>  
> +#define PNV10_XSCOM_PEC_NEST_BASE  0x3011800 /* index goes downwards ... */
> +#define PNV10_XSCOM_PEC_NEST_SIZE  0x100
> +
> +#define PNV10_XSCOM_PEC_PCI_BASE   0x8010800 /* index goes upwards ... */
> +#define PNV10_XSCOM_PEC_PCI_SIZE   0x200
> +
>  void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
>  int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset,
>                   uint64_t xscom_base, uint64_t xscom_size,
> diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
> index 911d147ffd7d..869fd77b62cc 100644
> --- a/hw/pci-host/pnv_phb4_pec.c
> +++ b/hw/pci-host/pnv_phb4_pec.c
> @@ -586,9 +586,53 @@ static const TypeInfo pnv_pec_stk_type_info = {
>      }
>  };
>  
> +/*
> + * POWER10 definitions
> + */
> +
> +static uint32_t pnv_phb5_pec_xscom_pci_base(PnvPhb4PecState *pec)
> +{
> +    return PNV10_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
> +}
> +
> +static uint32_t pnv_phb5_pec_xscom_nest_base(PnvPhb4PecState *pec)
> +{
> +    /* index goes down ... */
> +    return PNV10_XSCOM_PEC_NEST_BASE - 0x1000000 * pec->index;
> +}
> +
> +static void pnv_phb5_pec_class_init(ObjectClass *klass, void *data)
> +{
> +    PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
> +    static const char compat[] = "ibm,power10-pbcq";
> +    static const char stk_compat[] = "ibm,power10-phb-stack";
> +
> +    pecc->xscom_nest_base = pnv_phb5_pec_xscom_nest_base;
> +    pecc->xscom_pci_base  = pnv_phb5_pec_xscom_pci_base;
> +    pecc->xscom_nest_size = PNV10_XSCOM_PEC_NEST_SIZE;
> +    pecc->xscom_pci_size  = PNV10_XSCOM_PEC_PCI_SIZE;
> +    pecc->compat = compat;
> +    pecc->compat_size = sizeof(compat);
> +    pecc->stk_compat = stk_compat;
> +    pecc->stk_compat_size = sizeof(stk_compat);
> +}
> +
> +static const TypeInfo pnv_phb5_pec_type_info = {
> +    .name          = TYPE_PNV_PHB5_PEC,
> +    .parent        = TYPE_PNV_PHB4_PEC,
> +    .instance_size = sizeof(PnvPhb4PecState),
> +    .class_init    = pnv_phb5_pec_class_init,
> +    .class_size    = sizeof(PnvPhb4PecClass),
> +    .interfaces    = (InterfaceInfo[]) {
> +        { TYPE_PNV_XSCOM_INTERFACE },
> +        { }
> +    }
> +};
> +
>  static void pnv_pec_register_types(void)
>  {
>      type_register_static(&pnv_pec_type_info);
> +    type_register_static(&pnv_phb5_pec_type_info);
>      type_register_static(&pnv_pec_stk_type_info);
>  }
>  
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index fc751dd575d4..ac4bd2a17a9e 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -705,9 +705,17 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, 
> uint32_t irq)
>  static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
>  {
>      Pnv10Chip *chip10 = PNV10_CHIP(chip);
> +    int i, j;
>  
>      pnv_xive2_pic_print_info(&chip10->xive, mon);
>      pnv_psi_pic_print_info(&chip10->psi, mon);
> +
> +    for (i = 0; i < PNV10_CHIP_MAX_PEC; i++) {
> +        PnvPhb4PecState *pec = &chip10->pecs[i];
> +        for (j = 0; j < pec->num_stacks; j++) {
> +            pnv_phb4_pic_print_info(&pec->stacks[j].phb, mon);
> +        }
> +    }
>  }
>  
>  static void pnv_init(MachineState *machine)
> @@ -1607,7 +1615,10 @@ static void pnv_chip_power9_class_init(ObjectClass 
> *klass, void *data)
>  
>  static void pnv_chip_power10_instance_init(Object *obj)
>  {
> +    PnvChip *chip = PNV_CHIP(obj);
>      Pnv10Chip *chip10 = PNV10_CHIP(obj);
> +    PnvChipClass *pcc = PNV_CHIP_GET_CLASS(obj);
> +    int i;
>  
>      object_initialize_child(obj, "xive", &chip10->xive, sizeof(chip10->xive),
>                              TYPE_PNV_XIVE2, &error_abort, NULL);
> @@ -1619,6 +1630,17 @@ static void pnv_chip_power10_instance_init(Object *obj)
>                              TYPE_PNV10_LPC, &error_abort, NULL);
>      object_initialize_child(obj, "occ",  &chip10->occ, sizeof(chip10->occ),
>                              TYPE_PNV10_OCC, &error_abort, NULL);
> +
> +    for (i = 0; i < PNV10_CHIP_MAX_PEC; i++) {
> +        object_initialize_child(obj, "pec[*]", &chip10->pecs[i],
> +                                sizeof(chip10->pecs[i]), TYPE_PNV_PHB5_PEC,
> +                                &error_abort, NULL);
> +    }
> +
> +    /*
> +     * Number of PHBs is the chip default
> +     */
> +    chip->num_phbs = pcc->num_phbs;
>  }
>  
>  
> @@ -1648,6 +1670,77 @@ static void pnv_chip_power10_quad_realize(Pnv10Chip 
> *chip10, Error **errp)
>      }
>  }
>  
> +static void pnv_chip_power10_phb_realize(PnvChip *chip, Error **errp)
> +{
> +    Pnv10Chip *chip10 = PNV10_CHIP(chip);
> +    Error *local_err = NULL;
> +    int i, j;
> +    int phb_id = 0;
> +
> +    for (i = 0; i < PNV10_CHIP_MAX_PEC; i++) {
> +        PnvPhb4PecState *pec = &chip10->pecs[i];
> +        PnvPhb4PecClass *pecc = PNV_PHB4_PEC_GET_CLASS(pec);
> +        uint32_t pec_nest_base;
> +        uint32_t pec_pci_base;
> +
> +        object_property_set_int(OBJECT(pec), i, "index", &error_fatal);
> +        /*
> +         * PEC0 -> 3 stacks
> +         * PEC1 -> 3 stacks
> +         */
> +        object_property_set_int(OBJECT(pec), 3, "num-stacks",
> +                                &error_fatal);
> +        object_property_set_int(OBJECT(pec), chip->chip_id, "chip-id",
> +                                 &error_fatal);
> +        object_property_set_link(OBJECT(pec), OBJECT(get_system_memory()),
> +                                 "system-memory", &error_abort);
> +        object_property_set_bool(OBJECT(pec), true, "realized", &local_err);
> +        if (local_err) {
> +            error_propagate(errp, local_err);
> +            return;
> +        }
> +
> +        pec_nest_base = pecc->xscom_nest_base(pec);
> +        pec_pci_base = pecc->xscom_pci_base(pec);
> +
> +        pnv_xscom_add_subregion(chip, pec_nest_base, &pec->nest_regs_mr);
> +        pnv_xscom_add_subregion(chip, pec_pci_base, &pec->pci_regs_mr);
> +
> +        for (j = 0; j < pec->num_stacks && phb_id < chip->num_phbs;
> +             j++, phb_id++) {
> +            PnvPhb4PecStack *stack = &pec->stacks[j];
> +            Object *obj = OBJECT(&stack->phb);
> +
> +            object_property_set_int(obj, phb_id, "index", &error_fatal);
> +            object_property_set_int(obj, chip->chip_id, "chip-id",
> +                                    &error_fatal);
> +            object_property_set_int(obj, PNV_PHB5_VERSION, "version",
> +                                    &error_fatal);
> +            object_property_set_int(obj, PNV_PHB5_DEVICE_ID, "device-id",
> +                                    &error_fatal);
> +            object_property_set_link(obj, OBJECT(stack), "stack", 
> &error_abort);
> +            object_property_set_bool(obj, true, "realized", &local_err);
> +            if (local_err) {
> +                error_propagate(errp, local_err);
> +                return;
> +            }
> +            qdev_set_parent_bus(DEVICE(obj), sysbus_get_default());
> +
> +            /* Populate the XSCOM address space. */
> +            pnv_xscom_add_subregion(chip,
> +                                   pec_nest_base + 0x40 * (stack->stack_no + 
> 1),
> +                                   &stack->nest_regs_mr);
> +            pnv_xscom_add_subregion(chip,
> +                                    pec_pci_base + 0x40 * (stack->stack_no + 
> 1),
> +                                    &stack->pci_regs_mr);
> +            pnv_xscom_add_subregion(chip,
> +                                    pec_pci_base + PNV9_XSCOM_PEC_PCI_STK0 +
> +                                    0x40 * stack->stack_no,
> +                                    &stack->phb_regs_mr);
> +        }
> +    }
> +}
> +
>  static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
>  {
>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
> @@ -1737,6 +1830,13 @@ static void pnv_chip_power10_realize(DeviceState *dev, 
> Error **errp)
>      }
>      pnv_xscom_add_subregion(chip, PNV10_XSCOM_OCC_BASE,
>                              &chip10->occ.xscom_regs);
> +
> +    /* PHBs */
> +    pnv_chip_power10_phb_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
>  }
>  
>  static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
> @@ -1763,6 +1863,7 @@ static void pnv_chip_power10_class_init(ObjectClass 
> *klass, void *data)
>      k->xscom_core_base = pnv_chip_power10_xscom_core_base;
>      k->xscom_pcba = pnv_chip_power10_xscom_pcba;
>      dc->desc = "PowerNV Chip POWER10";
> +    k->num_phbs = 6;
>  
>      device_class_set_parent_realize(dc, pnv_chip_power10_realize,
>                                      &k->parent_realize);