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Re: [PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP |
Date: |
Tue, 26 May 2020 17:51:01 -0700 |
On Wed, May 20, 2020 at 6:52 PM Bin Meng <address@hidden> wrote:
>
> On Wed, May 20, 2020 at 5:40 AM Alistair Francis
> <address@hidden> wrote:
> >
> > Signed-off-by: Alistair Francis <address@hidden>
> > ---
> > target/riscv/pmp.c | 14 +++++++++-----
> > 1 file changed, 9 insertions(+), 5 deletions(-)
> >
> > diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
> > index 0e6b640fbd..607a991260 100644
> > --- a/target/riscv/pmp.c
> > +++ b/target/riscv/pmp.c
> > @@ -233,12 +233,16 @@ bool pmp_hart_has_privs(CPURISCVState *env,
> > target_ulong addr,
> > return true;
> > }
> >
> > - /*
> > - * if size is unknown (0), assume that all bytes
> > - * from addr to the end of the page will be accessed.
> > - */
> > if (size == 0) {
> > - pmp_size = -(addr | TARGET_PAGE_MASK);
> > + if (!riscv_feature(env, RISCV_FEATURE_MMU)) {
>
> My previous comments were not fully addressed. I think the logic should be:
>
> if (riscv_feature(env, RISCV_FEATURE_MMU))
>
> Otherwise it does not match your comment and the commit title.
Ah! You are right. This uncovered a bug with how we set the MMU as
well. I have fixed this and added a new patch.
Alistair
>
> > + /*
> > + * If size is unknown (0), assume that all bytes
> > + * from addr to the end of the page will be accessed.
> > + */
> > + pmp_size = -(addr | TARGET_PAGE_MASK);
> > + } else {
> > + pmp_size = sizeof(target_ulong);
> > + }
> > } else {
> > pmp_size = size;
> > }
>
> Regards,
> Bin
- Re: [PATCH v3 3/9] target/riscv: Add the lowRISC Ibex CPU, (continued)
- [PATCH v3 4/9] riscv: Initial commit of OpenTitan machine, Alistair Francis, 2020/05/19
- [PATCH v3 5/9] hw/char: Initial commit of Ibex UART, Alistair Francis, 2020/05/19
- [PATCH v3 6/9] hw/intc: Initial commit of lowRISC Ibex PLIC, Alistair Francis, 2020/05/19
- [PATCH v3 7/9] riscv/opentitan: Connect the PLIC device, Alistair Francis, 2020/05/19
- [PATCH v3 8/9] riscv/opentitan: Connect the UART device, Alistair Francis, 2020/05/19
- [PATCH v3 9/9] target/riscv: Use a smaller guess size for no-MMU PMP, Alistair Francis, 2020/05/19