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From: | Chih-Min Chao |
Subject: | Re: [PATCH v2] riscv: Add helper to make NaN-boxing for FP register |
Date: | Tue, 9 Jun 2020 18:07:30 +0800 |
On 1/27/20 4:37 PM, Ian Jiang wrote:
> The function that makes NaN-boxing when a 32-bit value is assigned
> to a 64-bit FP register is split out to a helper gen_nanbox_fpr().
> Then it is applied in translating of the FLW instruction.
>
> Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
> ---
> target/riscv/insn_trans/trans_rvf.inc.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
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