Re: [PULL 00/23] target-arm queue

[no-reply]

Patchew URL: 
20200616095702.25848-1-peter.maydell@linaro.org/">https://patchew.org/QEMU/20200616095702.25848-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PULL 00/23] target-arm queue
Type: series
Message-id: 20200616095702.25848-1-peter.maydell@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   6675a65..cb8278c  master     -> master
 - [tag update]      
patchew/1592310699-58916-1-git-send-email-ani.sinha@nutanix.com -> 
patchew/1592310699-58916-1-git-send-email-ani.sinha@nutanix.com
 - [tag update]      patchew/20200615180346.3992-1-cfontana@suse.de -> 
patchew/20200615180346.3992-1-cfontana@suse.de
 * [new tag]         patchew/20200616131756.1073438-1-mreitz@redhat.com -> 
patchew/20200616131756.1073438-1-mreitz@redhat.com
 * [new tag]         patchew/cover.1592315226.git.balaton@eik.bme.hu -> 
patchew/cover.1592315226.git.balaton@eik.bme.hu
Switched to a new branch 'test'
b10a66e hw: arm: Set vendor property for IMX SDHCI emulations
5434a8f sd: sdhci: Implement basic vendor specific register support
23b105e hw/net/imx_fec: Convert debug fprintf() to trace events
d4fdcd5 target/arm/cpu: adjust virtual time for all KVM arm cpus
b120ecc Implement configurable descriptor size in ftgmac100
3ee9db4 hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers
2abd0f4 target/arm: Convert Neon VDUP (scalar) to decodetree
d206569 target/arm: Convert Neon VTBL, VTBX to decodetree
d539502 target/arm: Convert Neon VEXT to decodetree
dc3fa32 target/arm: Convert Neon 2-reg-scalar long multiplies to decodetree
9c55dbb target/arm: Convert Neon 2-reg-scalar VQRDMLAH, VQRDMLSH to decodetree
1fe8012 target/arm: Convert Neon 2-reg-scalar VQDMULH, VQRDMULH to decodetree
f65be1e target/arm: Convert Neon 2-reg-scalar float multiplies to decodetree
90f2d89 target/arm: Convert Neon 2-reg-scalar integer multiplies to decodetree
c5586e0 target/arm: Add missing TCG temp free in do_2shift_env_64()
9d49fd6 target/arm: Add 'static' and 'const' annotations to VSHLL function 
arrays
44f7ad3 target/arm: Convert Neon 3-reg-diff polynomial VMULL
b1d42f1 target/arm: Convert Neon 3-reg-diff saturating doubling multiplies
0c54f33 target/arm: Convert Neon 3-reg-diff long multiplies
2e63060 target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree
48849e2 target/arm: Convert Neon 3-reg-diff narrowing ops to decodetree
437030b target/arm: Convert Neon 3-reg-diff prewidening ops to decodetree
17f754e target/arm: Fix missing temp frees in do_vshll_2sh

=== OUTPUT BEGIN ===
1/23 Checking commit 17f754e375b2 (target/arm: Fix missing temp frees in 
do_vshll_2sh)
2/23 Checking commit 437030bc3cb0 (target/arm: Convert Neon 3-reg-diff 
prewidening ops to decodetree)
3/23 Checking commit 48849e2bec62 (target/arm: Convert Neon 3-reg-diff 
narrowing ops to decodetree)
4/23 Checking commit 2e630605a940 (target/arm: Convert Neon 3-reg-diff VABAL, 
VABDL to decodetree)
5/23 Checking commit 0c54f3379838 (target/arm: Convert Neon 3-reg-diff long 
multiplies)
ERROR: space required after that ',' (ctx:VxV)
#93: FILE: target/arm/translate-neon.inc.c:2203:
+#define DO_VMLAL(INSN,MULL,ACC)                                         \
                      ^

ERROR: space required after that ',' (ctx:VxV)
#93: FILE: target/arm/translate-neon.inc.c:2203:
+#define DO_VMLAL(INSN,MULL,ACC)                                         \
                           ^

ERROR: space required after that ',' (ctx:VxV)
#111: FILE: target/arm/translate-neon.inc.c:2221:
+DO_VMLAL(VMLAL_S,mull_s,add)
                 ^

ERROR: space required after that ',' (ctx:VxV)
#111: FILE: target/arm/translate-neon.inc.c:2221:
+DO_VMLAL(VMLAL_S,mull_s,add)
                        ^

ERROR: space required after that ',' (ctx:VxV)
#112: FILE: target/arm/translate-neon.inc.c:2222:
+DO_VMLAL(VMLAL_U,mull_u,add)
                 ^

ERROR: space required after that ',' (ctx:VxV)
#112: FILE: target/arm/translate-neon.inc.c:2222:
+DO_VMLAL(VMLAL_U,mull_u,add)
                        ^

ERROR: space required after that ',' (ctx:VxV)
#113: FILE: target/arm/translate-neon.inc.c:2223:
+DO_VMLAL(VMLSL_S,mull_s,sub)
                 ^

ERROR: space required after that ',' (ctx:VxV)
#113: FILE: target/arm/translate-neon.inc.c:2223:
+DO_VMLAL(VMLSL_S,mull_s,sub)
                        ^

ERROR: space required after that ',' (ctx:VxV)
#114: FILE: target/arm/translate-neon.inc.c:2224:
+DO_VMLAL(VMLSL_U,mull_u,sub)
                 ^

ERROR: space required after that ',' (ctx:VxV)
#114: FILE: target/arm/translate-neon.inc.c:2224:
+DO_VMLAL(VMLSL_U,mull_u,sub)
                        ^

total: 10 errors, 0 warnings, 138 lines checked

Patch 5/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/23 Checking commit b1d42f1b6bb0 (target/arm: Convert Neon 3-reg-diff 
saturating doubling multiplies)
7/23 Checking commit 44f7ad3ff5c2 (target/arm: Convert Neon 3-reg-diff 
polynomial VMULL)
WARNING: line over 80 characters
#157: FILE: target/arm/translate.c:5230:
+                /* Three registers of different lengths: handled by decodetree 
*/

total: 0 errors, 1 warnings, 131 lines checked

Patch 7/23 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
8/23 Checking commit 9d49fd623f15 (target/arm: Add 'static' and 'const' 
annotations to VSHLL function arrays)
9/23 Checking commit c5586e0ede35 (target/arm: Add missing TCG temp free in 
do_2shift_env_64())
10/23 Checking commit 90f2d89bbeec (target/arm: Convert Neon 2-reg-scalar 
integer multiplies to decodetree)
11/23 Checking commit f65be1ef3448 (target/arm: Convert Neon 2-reg-scalar float 
multiplies to decodetree)
12/23 Checking commit 1fe8012c6dc6 (target/arm: Convert Neon 2-reg-scalar 
VQDMULH, VQRDMULH to decodetree)
13/23 Checking commit 9c55dbb42c6f (target/arm: Convert Neon 2-reg-scalar 
VQRDMLAH, VQRDMLSH to decodetree)
14/23 Checking commit dc3fa32307ee (target/arm: Convert Neon 2-reg-scalar long 
multiplies to decodetree)
15/23 Checking commit d539502cbc14 (target/arm: Convert Neon VEXT to decodetree)
16/23 Checking commit d206569754c9 (target/arm: Convert Neon VTBL, VTBX to 
decodetree)
17/23 Checking commit 2abd0f4edf61 (target/arm: Convert Neon VDUP (scalar) to 
decodetree)
18/23 Checking commit 3ee9db47776a (hw/misc/imx6ul_ccm: Implement non writable 
bits in CCM registers)
19/23 Checking commit b120eccbe343 (Implement configurable descriptor size in 
ftgmac100)
20/23 Checking commit d4fdcd514d56 (target/arm/cpu: adjust virtual time for all 
KVM arm cpus)
21/23 Checking commit 23b105e13216 (hw/net/imx_fec: Convert debug fprintf() to 
trace events)
22/23 Checking commit 5434a8fd0c9c (sd: sdhci: Implement basic vendor specific 
register support)
23/23 Checking commit b10a66ee4d59 (hw: arm: Set vendor property for IMX SDHCI 
emulations)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
20200616095702.25848-1-peter.maydell@linaro.org/testing.checkpatch/?type=message">http://patchew.org/logs/20200616095702.25848-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
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