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[PATCH v2 074/100] target/arm: Use helper_gvec_ml{a, s}_idx_* for aa64 a
From: |
Richard Henderson |
Subject: |
[PATCH v2 074/100] target/arm: Use helper_gvec_ml{a, s}_idx_* for aa64 advsimd |
Date: |
Wed, 17 Jun 2020 21:26:18 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-a64.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a3135754ce..5ef6ecfbf1 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -13053,6 +13053,40 @@ static void disas_simd_indexed(DisasContext *s,
uint32_t insn)
return;
}
break;
+
+ case 0x10: /* MLA */
+ if (!is_long && !is_scalar) {
+ static gen_helper_gvec_4 * const fns[3] = {
+ gen_helper_gvec_mla_idx_h,
+ gen_helper_gvec_mla_idx_s,
+ gen_helper_gvec_mla_idx_d,
+ };
+ tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
+ vec_full_reg_offset(s, rn),
+ vec_full_reg_offset(s, rm),
+ vec_full_reg_offset(s, rd),
+ is_q ? 16 : 8, vec_full_reg_size(s),
+ index, fns[size - 1]);
+ return;
+ }
+ break;
+
+ case 0x14: /* MLS */
+ if (!is_long && !is_scalar) {
+ static gen_helper_gvec_4 * const fns[3] = {
+ gen_helper_gvec_mls_idx_h,
+ gen_helper_gvec_mls_idx_s,
+ gen_helper_gvec_mls_idx_d,
+ };
+ tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
+ vec_full_reg_offset(s, rn),
+ vec_full_reg_offset(s, rm),
+ vec_full_reg_offset(s, rd),
+ is_q ? 16 : 8, vec_full_reg_size(s),
+ index, fns[size - 1]);
+ return;
+ }
+ break;
}
if (size == 3) {
--
2.25.1
- [PATCH v2 068/100] target/arm: Pass separate addend to FCMLA helpers, (continued)
- [PATCH v2 068/100] target/arm: Pass separate addend to FCMLA helpers, Richard Henderson, 2020/06/18
- [PATCH v2 069/100] target/arm: Split out formats for 2 vectors + 1 index, Richard Henderson, 2020/06/18
- [PATCH v2 070/100] target/arm: Split out formats for 3 vectors + 1 index, Richard Henderson, 2020/06/18
- [PATCH v2 071/100] target/arm: Implement SVE2 integer multiply (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 073/100] target/arm: Implement SVE2 integer multiply-add (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 072/100] target/arm: Use helper_gvec_mul_idx_* for aa64 advsimd, Richard Henderson, 2020/06/18
- [PATCH v2 077/100] target/arm: Implement SVE2 integer multiply long (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 076/100] target/arm: Implement SVE2 saturating multiply-add (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 078/100] target/arm: Implement SVE2 saturating multiply (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 075/100] target/arm: Implement SVE2 saturating multiply-add high (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 074/100] target/arm: Use helper_gvec_ml{a, s}_idx_* for aa64 advsimd,
Richard Henderson <=
- [PATCH v2 079/100] target/arm: Implement SVE2 signed saturating doubling multiply high, Richard Henderson, 2020/06/18
- [PATCH v2 080/100] target/arm: Use helper_neon_sq{, r}dmul_* for aa64 advsimd, Richard Henderson, 2020/06/18
- [PATCH v2 081/100] target/arm: Implement SVE2 saturating multiply high (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 082/100] target/arm: Implement SVE2 multiply-add long (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 083/100] target/arm: Implement SVE2 complex integer multiply-add (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 084/100] target/arm: Implement SVE mixed sign dot product (indexed), Richard Henderson, 2020/06/18
- [PATCH v2 087/100] target/arm: Implement SVE2 crypto destructive binary operations, Richard Henderson, 2020/06/18
- [PATCH v2 086/100] target/arm: Implement SVE2 crypto unary operations, Richard Henderson, 2020/06/18
- [PATCH v2 088/100] target/arm: Implement SVE2 crypto constructive binary operations, Richard Henderson, 2020/06/18
- [PATCH v2 085/100] target/arm: Implement SVE mixed sign dot product, Richard Henderson, 2020/06/18