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Re: [PATCH v3 1/8] target/ppc: Introduce Power ISA 3.1 flag
From: |
Richard Henderson |
Subject: |
Re: [PATCH v3 1/8] target/ppc: Introduce Power ISA 3.1 flag |
Date: |
Thu, 25 Jun 2020 10:40:19 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 |
On 6/25/20 10:00 AM, Lijun Pan wrote:
> + /* POWER ISA 3.1
> */
> + PPC2_ISA310 = 0x0000000000100000ULL,
This goes in the first patch, but...
> #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX |
> \
> PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
> @@ -2199,7 +2201,7 @@ enum {
> PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
> PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
> PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
> - PPC2_ISA300)
> + PPC2_ISA300 | PPC2_ISA310)
... all of the rest belongs in a separate patch, which will be sorted to the
end of the patch set.
It's ok to keep the second patch at the beginning during development, so that
you can test each instruction as you add it. But for final commit you do not
want to enable the feature until it is complete.
r~
- [PATCH v3 0/8] Add several Power ISA 3.1 32/64-bit vector instructions, Lijun Pan, 2020/06/25
- [PATCH v3 5/8] target/ppc: add vmulh{su}w instructions, Lijun Pan, 2020/06/25
- [PATCH v3 6/8] fix the prototype of muls64/mulu64, Lijun Pan, 2020/06/25
- [PATCH v3 2/8] target/ppc: add byte-reverse br[dwh] instructions, Lijun Pan, 2020/06/25
- [PATCH v3 4/8] target/ppc: add vmulld instruction, Lijun Pan, 2020/06/25