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[PATCH rc6 00/30] target/avr merger
From: |
Thomas Huth |
Subject: |
[PATCH rc6 00/30] target/avr merger |
Date: |
Sun, 5 Jul 2020 16:02:45 +0200 |
This is the AVR port from Michael, release (merge) candidate 6.
I've rebased rc5 to the current master branch, fixed the conflicts,
and updated the APIs where necessary (e.g. qdev_create() had to be
replaced).
These patches have been on the list for a long time. Let's try to
get them finally merged.
You can also find the patches in my repo here:
https://gitlab.com/huth/qemu/-/tree/avr
rc6:
- Rebased to master, fixed conflicts
- Changed the object_initialize_child() and qdev_create() calls
where necessary
- Converted the texi doc to Sphinx
- Dropped the travis.yml patch - the acceptance CI is currently moved
to gitlab, so we should add it later there instead
- Dropped the patch to clean up MAINTAINERs - and do it correctly
right from the start instead.
Michael Rolnik (26):
target/avr: Add basic parameters of the new platform
target/avr: Introduce basic CPU class object
target/avr: CPU class: Add interrupt handling support
target/avr: CPU class: Add memory menagement support
target/avr: CPU class: Add migration support
target/avr: CPU class: Add GDB support
target/avr: Introduce enumeration AVRFeature
target/avr: Add defintions of AVR core types
target/avr: Add instruction helpers
target/avr: Add instruction translation - Register definitions
target/avr: Add instruction translation - Arithmetic and Logic
Instructions
target/avr: Add instruction translation - Branch Instructions
target/avr: Add instruction translation - Data Transfer Instructions
target/avr: Add instruction translation - Bit and Bit-test
Instructions
target/avr: Add instruction translation - MCU Control Instructions
target/avr: Add instruction translation - CPU main translation
function
target/avr: Initialize TCG register variables
target/avr: Add support for disassembling via option '-d in_asm'
hw/char: avr: Add limited support for USART peripheral
hw/timer: avr: Add limited support for 16-bit timer peripheral
hw/misc: avr: Add limited support for power reduction device
target/avr: Register AVR support with the rest of QEMU
target/avr: Update build system
tests/machine-none: Add AVR support
tests/boot-serial: Test some Arduino boards (AVR based)
tests/acceptance: Test the Arduino MEGA2560 board
Philippe Mathieu-Daudé (3):
hw/avr: Add support for loading ELF/raw binaries
hw/avr: Add some ATmega microcontrollers
hw/avr: Add limited support for some Arduino boards
Thomas Huth (1):
target/avr: Add section into QEMU documentation
MAINTAINERS | 30 +
arch_init.c | 2 +
configure | 7 +
default-configs/avr-softmmu.mak | 5 +
docs/system/target-avr.rst | 37 +
docs/system/targets.rst | 1 +
gdb-xml/avr-cpu.xml | 49 +
hw/Kconfig | 1 +
hw/avr/Kconfig | 9 +
hw/avr/Makefile.objs | 3 +
hw/avr/arduino.c | 149 ++
hw/avr/atmega.c | 458 +++++
hw/avr/atmega.h | 48 +
hw/avr/boot.c | 116 ++
hw/avr/boot.h | 33 +
hw/char/Kconfig | 3 +
hw/char/Makefile.objs | 1 +
hw/char/avr_usart.c | 320 ++++
hw/misc/Kconfig | 3 +
hw/misc/Makefile.objs | 2 +
hw/misc/avr_power.c | 113 ++
hw/misc/trace-events | 4 +
hw/timer/Kconfig | 3 +
hw/timer/Makefile.objs | 2 +
hw/timer/avr_timer16.c | 609 ++++++
hw/timer/trace-events | 12 +
include/disas/dis-asm.h | 19 +
include/elf.h | 4 +
include/hw/char/avr_usart.h | 93 +
include/hw/misc/avr_power.h | 46 +
include/hw/timer/avr_timer16.h | 94 +
include/sysemu/arch_init.h | 1 +
qapi/machine.json | 2 +-
target/avr/Makefile.objs | 34 +
target/avr/cpu-param.h | 37 +
target/avr/cpu-qom.h | 54 +
target/avr/cpu.c | 777 ++++++++
target/avr/cpu.h | 256 +++
target/avr/disas.c | 246 +++
target/avr/gdbstub.c | 84 +
target/avr/helper.c | 342 ++++
target/avr/helper.h | 29 +
target/avr/insn.decode | 187 ++
target/avr/machine.c | 121 ++
target/avr/translate.c | 3073 ++++++++++++++++++++++++++++++
tests/acceptance/machine_avr6.py | 50 +
tests/qtest/Makefile.include | 2 +
tests/qtest/boot-serial-test.c | 11 +
tests/qtest/machine-none-test.c | 1 +
49 files changed, 7582 insertions(+), 1 deletion(-)
create mode 100644 default-configs/avr-softmmu.mak
create mode 100644 docs/system/target-avr.rst
create mode 100644 gdb-xml/avr-cpu.xml
create mode 100644 hw/avr/Kconfig
create mode 100644 hw/avr/Makefile.objs
create mode 100644 hw/avr/arduino.c
create mode 100644 hw/avr/atmega.c
create mode 100644 hw/avr/atmega.h
create mode 100644 hw/avr/boot.c
create mode 100644 hw/avr/boot.h
create mode 100644 hw/char/avr_usart.c
create mode 100644 hw/misc/avr_power.c
create mode 100644 hw/timer/avr_timer16.c
create mode 100644 include/hw/char/avr_usart.h
create mode 100644 include/hw/misc/avr_power.h
create mode 100644 include/hw/timer/avr_timer16.h
create mode 100644 target/avr/Makefile.objs
create mode 100644 target/avr/cpu-param.h
create mode 100644 target/avr/cpu-qom.h
create mode 100644 target/avr/cpu.c
create mode 100644 target/avr/cpu.h
create mode 100644 target/avr/disas.c
create mode 100644 target/avr/gdbstub.c
create mode 100644 target/avr/helper.c
create mode 100644 target/avr/helper.h
create mode 100644 target/avr/insn.decode
create mode 100644 target/avr/machine.c
create mode 100644 target/avr/translate.c
create mode 100644 tests/acceptance/machine_avr6.py
--
2.26.2
- [PATCH rc6 00/30] target/avr merger,
Thomas Huth <=
- [PATCH rc6 01/30] target/avr: Add basic parameters of the new platform, Thomas Huth, 2020/07/05
- [PATCH rc6 05/30] target/avr: CPU class: Add migration support, Thomas Huth, 2020/07/05
- [PATCH rc6 04/30] target/avr: CPU class: Add memory menagement support, Thomas Huth, 2020/07/05
- [PATCH rc6 03/30] target/avr: CPU class: Add interrupt handling support, Thomas Huth, 2020/07/05
- [PATCH rc6 02/30] target/avr: Introduce basic CPU class object, Thomas Huth, 2020/07/05
- [PATCH rc6 06/30] target/avr: CPU class: Add GDB support, Thomas Huth, 2020/07/05
- [PATCH rc6 08/30] target/avr: Add defintions of AVR core types, Thomas Huth, 2020/07/05
- [PATCH rc6 09/30] target/avr: Add instruction helpers, Thomas Huth, 2020/07/05
- [PATCH rc6 07/30] target/avr: Introduce enumeration AVRFeature, Thomas Huth, 2020/07/05
- [PATCH rc6 10/30] target/avr: Add instruction translation - Register definitions, Thomas Huth, 2020/07/05