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[PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR
From: |
Peter Maydell |
Subject: |
[PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR |
Date: |
Mon, 13 Jul 2020 15:10:45 +0100 |
From: Aaron Lindsay <aaron@os.amperecomputing.com>
Raw writes to this register when in KVM mode can cause interrupts to be
raised (even when the PMU is disabled). Because the underlying state is
already aliased to PMINTENSET (which already provides raw write
functions), we can safely disable raw accesses to PMINTENCLR entirely.
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index dc9c29f998f..c69a2baf1d3 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2269,13 +2269,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
.resetvalue = 0x0 },
{ .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 =
2,
.access = PL1_RW, .accessfn = access_tpm,
- .type = ARM_CP_ALIAS | ARM_CP_IO,
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
.writefn = pmintenclr_write, },
{ .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
.access = PL1_RW, .accessfn = access_tpm,
- .type = ARM_CP_ALIAS | ARM_CP_IO,
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
.writefn = pmintenclr_write },
{ .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
--
2.20.1
- [PULL 00/25] target-arm queue, Peter Maydell, 2020/07/13
- [PULL 01/25] hw/arm/bcm2836: Remove unused 'cpu_type' field, Peter Maydell, 2020/07/13
- [PULL 02/25] target/arm: Fix mtedesc for do_mem_zpz, Peter Maydell, 2020/07/13
- [PULL 03/25] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor, Peter Maydell, 2020/07/13
- [PULL 04/25] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor, Peter Maydell, 2020/07/13
- [PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR,
Peter Maydell <=
- [PULL 05/25] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor, Peter Maydell, 2020/07/13
- [PULL 07/25] virtio-iommu: Fix coverity issue in virtio_iommu_handle_command(), Peter Maydell, 2020/07/13
- [PULL 08/25] build: Enable BSD symbols for Haiku, Peter Maydell, 2020/07/13
- [PULL 09/25] util/qemu-openpty.c: Don't assume pty.h is glibc-only, Peter Maydell, 2020/07/13
- [PULL 10/25] build: Check that mlockall() exists, Peter Maydell, 2020/07/13
- [PULL 11/25] osdep.h: Always include <sys/signal.h> if it exists, Peter Maydell, 2020/07/13
- [PULL 12/25] osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL, Peter Maydell, 2020/07/13
- [PULL 14/25] util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD, Peter Maydell, 2020/07/13
- [PULL 13/25] bswap.h: Include <endian.h> on Haiku for bswap operations, Peter Maydell, 2020/07/13
- [PULL 15/25] util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku, Peter Maydell, 2020/07/13