Re: [PATCH 7/7] pc-bios: s390x: Setup io and ext new psws only once

[Janosch Frank]

On 7/15/20 11:40 AM, Janosch Frank wrote:
> Absolutely no need to set them up every time before we enable our
> interrupt masks.
> 
> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>

So, this one doesn't seem to be a great idea as a kernel loaded to 0x0
will overwrite the ext/io new PSWs and we'll then try to load a zero PSW
when an IRQ hits.

We have two options:
* Add a piece of code that fixes the low core after a kernel has been loaded
* Leave the code as is and add a comment, so other people don't fall
into this trap.

I'd be fine with both and for now I'd settle for the second option.

> ---
>  pc-bios/s390-ccw/start.S | 30 +++++++++++++-----------------
>  1 file changed, 13 insertions(+), 17 deletions(-)
> 
> diff --git a/pc-bios/s390-ccw/start.S b/pc-bios/s390-ccw/start.S
> index 01c4c21b26..0059a15d21 100644
> --- a/pc-bios/s390-ccw/start.S
> +++ b/pc-bios/s390-ccw/start.S
> @@ -34,6 +34,12 @@ loop:
>  remainder:
>       larl    %r2,memsetxc
>       ex      %r3,0(%r2)
> +        /* Store io new PSW */
> +        larl %r1,io_new_psw
> +        mvc  0x1f0(16),0(%r1)
> +     /* Store ext new PSW */
> +        larl %r1,external_new_psw
> +        mvc  0x1b0(16),0(%r1)
>  done:
>       j      main             /* And call C */
>  
> @@ -64,11 +70,6 @@ consume_sclp_int:
>          stctg   %c0,%c0,0(%r15)
>          oi      6(%r15),0x2
>          lctlg   %c0,%c0,0(%r15)
> -        /* prepare external call handler */
> -        larl %r1, external_new_code
> -        stg %r1, 0x1b8
> -        larl %r1, external_new_mask
> -        mvc 0x1b0(8),0(%r1)
>          /* load enabled wait PSW */
>          larl %r1, enabled_wait_psw
>          lpswe 0(%r1)
> @@ -81,14 +82,9 @@ consume_sclp_int:
>          .globl consume_io_int
>  consume_io_int:
>          /* enable I/O interrupts in cr6 */
> -        stctg %c6,%c6,0(%r15)
> -        oi    4(%r15), 0xff
> -        lctlg %c6,%c6,0(%r15)
> -        /* prepare i/o call handler */
> -        larl  %r1, io_new_code
> -        stg   %r1, 0x1f8
> -        larl  %r1, io_new_mask
> -        mvc   0x1f0(8),0(%r1)
> +        stctg        %c6, %c6, 0(%r15)
> +        oi   4(%r15), 0xff
> +        lctlg        %c6, %c6, 0(%r15)
>          /* load enabled wait PSW */
>          larl  %r1, enabled_wait_psw
>          lpswe 0(%r1)
> @@ -112,7 +108,7 @@ disabled_wait_psw:
>          .quad   PSW_MASK_DWAIT, 0x0000000000000000
>  enabled_wait_psw:
>          .quad   PSW_MASK_EWAIT, 0x0000000000000000
> -external_new_mask:
> -        .quad   PSW_MASK_64
> -io_new_mask:
> -        .quad   PSW_MASK_64
> +external_new_psw:
> +        .quad   PSW_MASK_64, external_new_code
> +io_new_psw:
> +        .quad   PSW_MASK_64, io_new_code
>

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