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Re: [RFC v2 19/76] target/riscv: rvv-0.9: add narrower_nanbox_fpr helper
From: |
Richard Henderson |
Subject: |
Re: [RFC v2 19/76] target/riscv: rvv-0.9: add narrower_nanbox_fpr helper |
Date: |
Thu, 23 Jul 2020 09:14:25 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 7/23/20 12:13 AM, Frank Chang wrote:
> On Thu, Jul 23, 2020 at 3:15 AM Richard Henderson
> <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>> wrote:
>
> On 7/22/20 2:15 AM, frank.chang@sifive.com <mailto:frank.chang@sifive.com>
> wrote:
> > From: Frank Chang <frank.chang@sifive.com
> <mailto:frank.chang@sifive.com>>
> >
> > For floating-point operations, the scalar can be taken from a scalar
> > f register. If FLEN > SEW, the value in the f registers is checked for
> > a valid NaN-boxed value, in which case the least-significant SEW bits
> > of the f register are used, else the canonical NaN value is used.
> >
> > Add helper to generate the correspond NaN-boxed value or the SEW-bit
> > canonical NaN for floating-point operations.
> >
> > Signed-off-by: Frank Chang <frank.chang@sifive.com
> <mailto:frank.chang@sifive.com>>
> > ---
> > target/riscv/helper.h | 2 ++
> > target/riscv/vector_helper.c | 32 ++++++++++++++++++++++++++++++++
> > 2 files changed, 34 insertions(+)
>
> The helper can be done inline in two tcg ops.
>
> Though, really, we need to coordinate with Liu Zhiwei's other patch set
> that
> also deals with nan-boxing.
>
>
> So, it's better to leverage the codes
> at: https://patchew.org/QEMU/20200626205917.4545-1-zhiwei_liu@c-sky.com/
> but has to extend for the case of SEW=16?
Yes, or what becomes of that patch set upon revision.
r~
- Re: [RFC v2 15/76] target/riscv: rvv-0.9: add fractional LMUL, (continued)
- [RFC v2 20/76] target/riscv: rvv-0.9: apply narrower nanbox helper in opfvf_trans, frank . chang, 2020/07/22
- [RFC v2 21/76] target/riscv: rvv-0.9: configure instructions, frank . chang, 2020/07/22
- [RFC v2 22/76] target/riscv: rvv-0.9: stride load and store instructions, frank . chang, 2020/07/22
- [RFC v2 23/76] target/riscv: rvv-0.9: index load and store instructions, frank . chang, 2020/07/22
- [RFC v2 24/76] target/riscv: rvv-0.9: fix address index overflow bug of indexed load/store insns, frank . chang, 2020/07/22
- [RFC v2 25/76] target/riscv: rvv-0.9: fault-only-first unit stride load, frank . chang, 2020/07/22
- [RFC v2 26/76] target/riscv: rvv-0.9: amo operations, frank . chang, 2020/07/22
- [RFC v2 27/76] target/riscv: rvv-0.9: load/store whole register instructions, frank . chang, 2020/07/22