qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH 2/3] target/riscv: Fix write_htinst() implementation


From: Anup Patel
Subject: [PATCH 2/3] target/riscv: Fix write_htinst() implementation
Date: Wed, 29 Jul 2020 16:58:00 +0530

The htinst CSR is writeable from M-mode and HS-mode so
we should not ignore writes to htinst CSR.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 target/riscv/csr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index f985b85de4..99fcb7f67d 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -943,6 +943,7 @@ static int read_htinst(CPURISCVState *env, int csrno, 
target_ulong *val)
 
 static int write_htinst(CPURISCVState *env, int csrno, target_ulong val)
 {
+    env->htinst = val;
     return 0;
 }
 
-- 
2.25.1




reply via email to

[Prev in Thread] Current Thread [Next in Thread]