[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [RFC v2 44/76] target/riscv: rvv-0.9: single-width averaging add and
|
From: |
Richard Henderson |
|
Subject: |
Re: [RFC v2 44/76] target/riscv: rvv-0.9: single-width averaging add and subtract instructions |
|
Date: |
Thu, 30 Jul 2020 13:45:52 -0700 |
|
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 7/22/20 2:16 AM, frank.chang@sifive.com wrote:
> From: Frank Chang <frank.chang@sifive.com>
>
> Add the following instructions:
>
> * vaaddu.vv
> * vaaddu.vx
> * vasubu.vv
> * vasubu.vx
>
> Remove the following instructions:
>
> * vadd.vi
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
> ---
> target/riscv/helper.h | 16 ++++++
> target/riscv/insn32.decode | 13 +++--
> target/riscv/insn_trans/trans_rvv.inc.c | 5 +-
> target/riscv/vector_helper.c | 74 +++++++++++++++++++++++++
> 4 files changed, 102 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> +static inline uint64_t aaddu64(CPURISCVState *env, int vxrm,
> + uint64_t a, uint64_t b)
> +{
> + uint64_t res = a + b;
> + uint8_t round = get_round(vxrm, res, 1);
> + uint64_t over = res < a ? ((uint64_t)1 << 63) : 0;
You know you can write this as
(uint64_t)(res < a) << 63
right?
r~
- [RFC v2 40/76] target/riscv: rvv-0.9: floating-point move instruction, (continued)
- [RFC v2 40/76] target/riscv: rvv-0.9: floating-point move instruction, frank . chang, 2020/07/22
- [RFC v2 41/76] target/riscv: rvv-0.9: floating-point scalar move instructions, frank . chang, 2020/07/22
- [RFC v2 42/76] target/riscv: rvv-0.9: whole register move instructions, frank . chang, 2020/07/22
- [RFC v2 43/76] target/riscv: rvv-0.9: integer extension instructions, frank . chang, 2020/07/22
- [RFC v2 44/76] target/riscv: rvv-0.9: single-width averaging add and subtract instructions, frank . chang, 2020/07/22
- Re: [RFC v2 44/76] target/riscv: rvv-0.9: single-width averaging add and subtract instructions,
Richard Henderson <=
- [RFC v2 45/76] target/riscv: rvv-0.9: single-width bit shift instructions, frank . chang, 2020/07/22
- [RFC v2 46/76] target/riscv: rvv-0.9: integer add-with-carry/subtract-with-borrow, frank . chang, 2020/07/22
- [RFC v2 47/76] target/riscv: rvv-0.9: narrowing integer right shift instructions, frank . chang, 2020/07/22
- [RFC v2 48/76] target/riscv: rvv-0.9: widening integer multiply-add instructions, frank . chang, 2020/07/22
- [RFC v2 49/76] target/riscv: rvv-0.9: quad-widening integer multiply-add instructions, frank . chang, 2020/07/22
- [RFC v2 50/76] target/riscv: rvv-0.9: single-width saturating add and subtract instructions, frank . chang, 2020/07/22