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Re: [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA
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From: |
Richard Henderson |
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Subject: |
Re: [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA |
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Date: |
Thu, 6 Aug 2020 12:08:13 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 8/6/20 3:46 AM, frank.chang@sifive.com wrote:
> From: Frank Chang <frank.chang@sifive.com>
>
> Introduce vma and vta fields in vtype register.
>
> According to RVV 1.0 spec (section 3.3.3):
>
> When a set is marked agnostic, the corresponding set of destination
> elements in any vector or mask destination operand can either retain
> the value they previously held, or are overwritten with 1s.
>
> So, either vta/vma is set to undisturbed or agnostic, it's legal to
> retain the inactive masked-off elements and tail elements' original
> values unchanged. Therefore, besides declaring vta/vma fields in vtype
> register, also remove all the tail elements clean functions in this
> commit.
>
> Signed-off-by: Frank Chang <frank.chang@sifive.com>
> ---
> target/riscv/cpu.h | 2 +
> target/riscv/vector_helper.c | 1927 ++++++++++++++++------------------
> 2 files changed, 891 insertions(+), 1038 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
- Re: [RFC v3 07/71] target/riscv: rvv-1.0: remove vxrm and vxsat fields from fcsr register, (continued)
- [RFC v3 08/71] target/riscv: rvv-1.0: add vcsr register, frank . chang, 2020/08/06
- [RFC v3 09/71] target/riscv: rvv-1.0: add vlenb register, frank . chang, 2020/08/06
- [RFC v3 10/71] target/riscv: rvv-1.0: check MSTATUS_VS when accessing vector csr registers, frank . chang, 2020/08/06
- [RFC v3 11/71] target/riscv: rvv-1.0: remove MLEN calculations, frank . chang, 2020/08/06
- [RFC v3 12/71] target/riscv: rvv-1.0: add fractional LMUL, frank . chang, 2020/08/06
- [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA, frank . chang, 2020/08/06
- Re: [RFC v3 13/71] target/riscv: rvv-1.0: add VMA and VTA,
Richard Henderson <=
- [RFC v3 15/71] target/riscv: introduce more imm value modes in translator functions, frank . chang, 2020/08/06
- [RFC v3 16/71] target/riscv: add fp16 nan-box check generator function, frank . chang, 2020/08/06
- [RFC v3 14/71] target/riscv: rvv-1.0: update check functions, frank . chang, 2020/08/06
- [RFC v3 17/71] target/riscv: rvv:1.0: add translation-time nan-box helper function, frank . chang, 2020/08/06
- [RFC v3 19/71] target/riscv: rvv-1.0: configure instructions, frank . chang, 2020/08/06
- [RFC v3 18/71] target/riscv: rvv-1.0: apply nanbox helper in opfvf_trans, frank . chang, 2020/08/06