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[PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree
From: |
Richard Henderson |
Subject: |
[PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree |
Date: |
Mon, 31 Aug 2020 09:05:55 -0700 |
Split this out of dec_msr.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/microblaze/insns.decode | 6 +++
target/microblaze/translate.c | 85 +++++++++++++++++++---------------
2 files changed, 54 insertions(+), 37 deletions(-)
diff --git a/target/microblaze/insns.decode b/target/microblaze/insns.decode
index 8906058a29..ed3312982f 100644
--- a/target/microblaze/insns.decode
+++ b/target/microblaze/insns.decode
@@ -24,6 +24,7 @@
&typeb rd ra imm
&typeb_br rd imm
&typeb_bc ra imm
+&type_msr rd imm
# Include any IMM prefix in the value reported.
%extimm 0:s16 !function=typeb_imm
@@ -55,6 +56,8 @@
%ieimm 6:5 0:5
@typeb_ie ...... rd:5 ra:5 ..... ..... . ..... &typeb imm=%ieimm
+@type_msr ...... rd:5 ...... imm:15 &type_msr
+
###
{
@@ -179,6 +182,9 @@ lwi 111010 ..... ..... ................
@typeb
mbar 101110 imm:5 00010 0000 0000 0000 0100
+msrclr 100101 ..... 100010 ............... @type_msr
+msrset 100101 ..... 100000 ............... @type_msr
+
mul 010000 ..... ..... ..... 000 0000 0000 @typea
mulh 010000 ..... ..... ..... 000 0000 0001 @typea
mulhu 010000 ..... ..... ..... 000 0000 0011 @typea
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 0872795038..9479dbc103 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1311,16 +1311,61 @@ static void msr_write(DisasContext *dc, TCGv_i32 v)
tcg_gen_andi_i32(cpu_msr, v, ~(MSR_C | MSR_CC | MSR_PVR));
}
+static bool do_msrclrset(DisasContext *dc, arg_type_msr *arg, bool set)
+{
+ uint32_t imm = arg->imm;
+
+ if (trap_userspace(dc, imm != MSR_C)) {
+ return true;
+ }
+
+ if (arg->rd) {
+ msr_read(dc, cpu_R[arg->rd]);
+ }
+
+ /*
+ * Handle the carry bit separately.
+ * This is the only bit that userspace can modify.
+ */
+ if (imm & MSR_C) {
+ tcg_gen_movi_i32(cpu_msr_c, set);
+ }
+
+ /*
+ * MSR_C and MSR_CC set above.
+ * MSR_PVR is not writable, and is always clear.
+ */
+ imm &= ~(MSR_C | MSR_CC | MSR_PVR);
+
+ if (imm != 0) {
+ if (set) {
+ tcg_gen_ori_i32(cpu_msr, cpu_msr, imm);
+ } else {
+ tcg_gen_andi_i32(cpu_msr, cpu_msr, ~imm);
+ }
+ dc->cpustate_changed = 1;
+ }
+ return true;
+}
+
+static bool trans_msrclr(DisasContext *dc, arg_type_msr *arg)
+{
+ return do_msrclrset(dc, arg, false);
+}
+
+static bool trans_msrset(DisasContext *dc, arg_type_msr *arg)
+{
+ return do_msrclrset(dc, arg, true);
+}
+
static void dec_msr(DisasContext *dc)
{
CPUState *cs = CPU(dc->cpu);
- TCGv_i32 t0, t1;
unsigned int sr, rn;
- bool to, clrset, extended = false;
+ bool to, extended = false;
sr = extract32(dc->imm, 0, 14);
to = extract32(dc->imm, 14, 1);
- clrset = extract32(dc->imm, 15, 1) == 0;
dc->type_b = 1;
if (to) {
dc->cpustate_changed = 1;
@@ -1334,40 +1379,6 @@ static void dec_msr(DisasContext *dc)
extended = extract32(dc->imm, e_bit[to], 1);
}
- /* msrclr and msrset. */
- if (clrset) {
- bool clr = extract32(dc->ir, 16, 1);
-
- if (!dc->cpu->cfg.use_msr_instr) {
- /* nop??? */
- return;
- }
-
- if (trap_userspace(dc, dc->imm != 4 && dc->imm != 0)) {
- return;
- }
-
- if (dc->rd)
- msr_read(dc, cpu_R[dc->rd]);
-
- t0 = tcg_temp_new_i32();
- t1 = tcg_temp_new_i32();
- msr_read(dc, t0);
- tcg_gen_mov_i32(t1, *(dec_alu_op_b(dc)));
-
- if (clr) {
- tcg_gen_not_i32(t1, t1);
- tcg_gen_and_i32(t0, t0, t1);
- } else
- tcg_gen_or_i32(t0, t0, t1);
- msr_write(dc, t0);
- tcg_temp_free_i32(t0);
- tcg_temp_free_i32(t1);
- tcg_gen_movi_i32(cpu_pc, dc->base.pc_next + 4);
- dc->base.is_jmp = DISAS_UPDATE;
- return;
- }
-
if (trap_userspace(dc, to)) {
return;
}
--
2.25.1
- [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set, (continued)
- [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 62/76] target/microblaze: Tidy mb_cpu_dump_state, Richard Henderson, 2020/08/31
- [PULL 61/76] target/microblaze: Replace delayed_branch with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 63/76] target/microblaze: Convert brk and brki to decodetree, Richard Henderson, 2020/08/31
- [PULL 64/76] target/microblaze: Convert mbar to decodetree, Richard Henderson, 2020/08/31
- [PULL 65/76] target/microblaze: Reorganize branching, Richard Henderson, 2020/08/31
- [PULL 66/76] target/microblaze: Convert dec_br to decodetree, Richard Henderson, 2020/08/31
- [PULL 67/76] target/microblaze: Convert dec_bcc to decodetree, Richard Henderson, 2020/08/31
- [PULL 68/76] target/microblaze: Convert dec_rts to decodetree, Richard Henderson, 2020/08/31
- [PULL 69/76] target/microblaze: Tidy do_rti, do_rtb, do_rte, Richard Henderson, 2020/08/31
- [PULL 70/76] target/microblaze: Convert msrclr, msrset to decodetree,
Richard Henderson <=
- [PULL 71/76] target/microblaze: Convert dec_msr to decodetree, Richard Henderson, 2020/08/31
- [PULL 72/76] target/microblaze: Convert dec_stream to decodetree, Richard Henderson, 2020/08/31
- [PULL 74/76] target/microblaze: Remove cpu_R[0], Richard Henderson, 2020/08/31
- [PULL 73/76] target/microblaze: Remove last of old decoder, Richard Henderson, 2020/08/31
- [PULL 75/76] target/microblaze: Add flags markup to some helpers, Richard Henderson, 2020/08/31
- [PULL 76/76] target/microblaze: Reduce linux-user address space to 32-bit, Richard Henderson, 2020/08/31
- Re: [PULL 00/76] target/microblaze improvements, no-reply, 2020/08/31
- Re: [PULL 00/76] target/microblaze improvements, no-reply, 2020/08/31