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Re: Why QEMU translates one instruction to a TB?

From: Peter Maydell
Subject: Re: Why QEMU translates one instruction to a TB?
Date: Fri, 18 Sep 2020 10:39:23 +0100

On Fri, 18 Sep 2020 at 07:12, casmac <climber.cui@qq.com> wrote:
> Hello ,
>   thanks for the hints. I modified one parameter of  memory_region_init_ram() 
> call ,and the slow-path problem disappeared.
>   What I did is , change the RAM size from the exact memory size needed to 
> hold the object file section(s), to the size that TI C3X user manual memory 
> mapping specifies.
>   The former size is significantly smaller. But I did not specify the memory 
> mapping else where in the program, so still unsure about the cause of 
> conflict.
>             memory_region_init_ram(ary_sect_chain[i].mem_region, NULL, 
> ary_sect_chain[i].s_name,
>                                    /*ary_sect_chain[i].chain_size*4*/  
> ary_sect_chain[i].region_size,  &error_fatal);      //region_size is fixed as 
> specified in CPU manual , region_size>chain_size*4

This still looks very strange. You shouldn't be creating
RAM memory regions in your COFF file loader at all. You create
the RAM memory regions for the board in the board model. Then
the file loader only needs to call rom_add_blob() or similar.
Look at the way we handle ELF files -- COFF loading should
work on a similar principle.

-- PMM

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