qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v1 0/4] Allow loading a no MMU kernel


From: Bin Meng
Subject: Re: [PATCH v1 0/4] Allow loading a no MMU kernel
Date: Fri, 9 Oct 2020 17:53:15 +0800

Hi Alistair,

On Fri, Oct 2, 2020 at 11:50 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> This series allows loading a noMMU kernel using the -kernel option.
> Currently if using -kernel QEMU assumes you also have firmware and loads
> the kernel at a hardcoded offset. This series changes that so we only
> load the kernel at an offset if a firmware (-bios) was loaded.
>
> This series also adds a function to check if the CPU is 32-bit. This is
> a step towards running 32-bit and 64-bit CPUs on the 64-bit RISC-V build
> by using run time checks instead of compile time checks. We also allow
> the user to sepcify a CPU for the sifive_u machine.

Could you please provide test scenarios for this series? I want to
have a try. Thanks.

>
> Alistair Francis (4):
>   hw/riscv: sifive_u: Allow specifying the CPU
>   hw/riscv: Return the end address of the loaded firmware
>   hw/riscv: Add a riscv_is_32_bit() function
>   hw/riscv: Load the kernel after the firmware
>
>  include/hw/riscv/boot.h     | 11 +++++----
>  include/hw/riscv/sifive_u.h |  1 +
>  hw/riscv/boot.c             | 47 ++++++++++++++++++++++++-------------
>  hw/riscv/opentitan.c        |  3 ++-
>  hw/riscv/sifive_e.c         |  3 ++-
>  hw/riscv/sifive_u.c         | 31 ++++++++++++++++++------
>  hw/riscv/spike.c            | 14 ++++++++---
>  hw/riscv/virt.c             | 14 ++++++++---
>  8 files changed, 89 insertions(+), 35 deletions(-)

Regards,
Bin



reply via email to

[Prev in Thread] Current Thread [Next in Thread]