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Re: [PATCH v2 07/10] target/arm: Implement v8.1M low-overhead-loop instr

From: Richard Henderson
Subject: Re: [PATCH v2 07/10] target/arm: Implement v8.1M low-overhead-loop instructions
Date: Mon, 19 Oct 2020 08:39:58 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 10/19/20 8:12 AM, Peter Maydell wrote:
> v8.1M's "low-overhead-loop" extension has three instructions
> for looping:
>  * DLS (start of a do-loop)
>  * WLS (start of a while-loop)
>  * LE (end of a loop)
> The loop-start instructions are both simple operations to start a
> loop whose iteration count (if any) is in LR.  The loop-end
> instruction handles "decrement iteration count and jump back to loop
> start"; it also caches the information about the branch back to the
> start of the loop to improve performance of the branch on subsequent
> iterations.
> As with the branch-future instructions, the architecture permits an
> implementation to discard the LO_BRANCH_INFO cache at any time, and
> QEMU takes the IMPDEF option to never set it in the first place
> (equivalent to discarding it immediately), because for us a "real"
> implementation would be unnecessary complexity.
> (This implementation only provides the simple looping constructs; the
> vector extension MVE (Helium) adds some extra variants to handle
> looping across vectors.  We'll add those later when we implement
> MVE.)
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  target/arm/t32.decode  |  8 ++++
>  target/arm/translate.c | 93 +++++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 99 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


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