[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 0/5] Fix the Hypervisor access functions
From: |
Alistair Francis |
Subject: |
[PATCH v2 0/5] Fix the Hypervisor access functions |
Date: |
Wed, 28 Oct 2020 07:42:17 -0700 |
Richard pointed out that the Hypervisor access functions don't work
correctly, see:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg751540.html.
This seris fixes them up by adding a new MMU index for the virtualised
state.
v2:
- Use only 6 MMU modes instead of 8
Alistair Francis (5):
target/riscv: Add a virtualised MMU Mode
target/riscv: Set the virtualised MMU mode when doing hyp accesses
target/riscv: Remove the HS_TWO_STAGE flag
target/riscv: Remove the hyp load and store functions
target/riscv: Split the Hypervisor execute load helpers
target/riscv/cpu-param.h | 10 +-
target/riscv/cpu.h | 7 +-
target/riscv/cpu_bits.h | 1 -
target/riscv/helper.h | 6 +-
target/riscv/cpu_helper.c | 67 ++++++-------
target/riscv/op_helper.c | 90 ++---------------
target/riscv/insn_trans/trans_rvh.c.inc | 127 +++++++-----------------
7 files changed, 90 insertions(+), 218 deletions(-)
--
2.28.0