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Re: [PATCH v3 01/41] tcg: Enhance flush_icache_range with separate data
From: |
Alex Bennée |
Subject: |
Re: [PATCH v3 01/41] tcg: Enhance flush_icache_range with separate data pointer |
Date: |
Fri, 06 Nov 2020 20:31:41 +0000 |
User-agent: |
mu4e 1.5.6; emacs 28.0.50 |
Richard Henderson <richard.henderson@linaro.org> writes:
> We are shortly going to have a split rw/rx jit buffer. Depending
> on the host, we need to flush the dcache at the rw data pointer and
> flush the icache at the rx code pointer.
>
> For now, the two passed pointers are identical, so there is no
> effective change in behaviour.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/aarch64/tcg-target.h | 9 +++++++--
> tcg/arm/tcg-target.h | 8 ++++++--
> tcg/i386/tcg-target.h | 3 ++-
> tcg/mips/tcg-target.h | 8 ++++++--
> tcg/ppc/tcg-target.h | 2 +-
> tcg/riscv/tcg-target.h | 8 ++++++--
> tcg/s390/tcg-target.h | 3 ++-
> tcg/sparc/tcg-target.h | 8 +++++---
> tcg/tci/tcg-target.h | 3 ++-
> softmmu/physmem.c | 9 ++++++++-
> tcg/tcg.c | 6 ++++--
> tcg/aarch64/tcg-target.c.inc | 2 +-
> tcg/mips/tcg-target.c.inc | 2 +-
> tcg/ppc/tcg-target.c.inc | 21 +++++++++++----------
> tcg/sparc/tcg-target.c.inc | 4 ++--
> 15 files changed, 64 insertions(+), 32 deletions(-)
>
> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
> index 663dd0b95e..d0a6a059b7 100644
> --- a/tcg/aarch64/tcg-target.h
> +++ b/tcg/aarch64/tcg-target.h
> @@ -148,9 +148,14 @@ typedef enum {
> #define TCG_TARGET_DEFAULT_MO (0)
> #define TCG_TARGET_HAS_MEMORY_BSWAP 1
>
> -static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t
> len)
> {
> - __builtin___clear_cache((char *)start, (char *)stop);
> + /* TODO: Copy this from gcc to avoid 4 loops instead of 2. */
Why not do it now?
> + if (rw != rx) {
> + __builtin___clear_cache((char *)rw, (char *)(rw + len));
> + }
> + __builtin___clear_cache((char *)rx, (char *)(rx + len));
> }
>
<snip>
>
> -static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
> +/* Flush the dcache at RW, and the icache at RX, as necessary. */
> +static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t
> len)
> {
> }
I take it i386 is just too primitive to care about flushing things?
Anyway:
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
- [PATCH v3 00/41] Mirror map JIT memory for TCG, Richard Henderson, 2020/11/05
- [PATCH v3 03/41] tcg: Move tcg epilogue pointer out of TCGContext, Richard Henderson, 2020/11/05
- [PATCH v3 04/41] tcg: Add in_code_gen_buffer, Richard Henderson, 2020/11/05
- [PATCH v3 02/41] tcg: Move tcg prologue pointer out of TCGContext, Richard Henderson, 2020/11/05
- [PATCH v3 05/41] tcg: Introduce tcg_splitwx_to_{rx,rw}, Richard Henderson, 2020/11/05
- [PATCH v3 06/41] tcg: Adjust TCGLabel for const, Richard Henderson, 2020/11/05
- [PATCH v3 07/41] tcg: Adjust tcg_out_call for const, Richard Henderson, 2020/11/05
- [PATCH v3 08/41] tcg: Adjust tcg_out_label for const, Richard Henderson, 2020/11/05