Re: [PATCH v4 1/4] hw/block/m25p80: Make Numonyx config field names more accurate

[Francisco Iglesias]

On Thu, Nov 12, 2020 at 07:10:52PM -0800, Joe Komlodi wrote:
> The previous naming of the configuration registers made it sound like that if
> the bits were set the settings would be enabled, while the opposite is true.
> 
> Signed-off-by: Joe Komlodi <komlodi@xilinx.com>

Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>

> ---
>  hw/block/m25p80.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
> index 483925f..452d252 100644
> --- a/hw/block/m25p80.c
> +++ b/hw/block/m25p80.c
> @@ -136,7 +136,7 @@ typedef struct FlashPartInfo {
>  #define VCFG_WRAP_SEQUENTIAL 0x2
>  #define NVCFG_XIP_MODE_DISABLED (7 << 9)
>  #define NVCFG_XIP_MODE_MASK (7 << 9)
> -#define VCFG_XIP_MODE_ENABLED (1 << 3)
> +#define VCFG_XIP_MODE_DISABLED (1 << 3)
>  #define CFG_DUMMY_CLK_LEN 4
>  #define NVCFG_DUMMY_CLK_POS 12
>  #define VCFG_DUMMY_CLK_POS 4
> @@ -144,9 +144,9 @@ typedef struct FlashPartInfo {
>  #define EVCFG_VPP_ACCELERATOR (1 << 3)
>  #define EVCFG_RESET_HOLD_ENABLED (1 << 4)
>  #define NVCFG_DUAL_IO_MASK (1 << 2)
> -#define EVCFG_DUAL_IO_ENABLED (1 << 6)
> +#define EVCFG_DUAL_IO_DISABLED (1 << 6)
>  #define NVCFG_QUAD_IO_MASK (1 << 3)
> -#define EVCFG_QUAD_IO_ENABLED (1 << 7)
> +#define EVCFG_QUAD_IO_DISABLED (1 << 7)
>  #define NVCFG_4BYTE_ADDR_MASK (1 << 0)
>  #define NVCFG_LOWER_SEGMENT_MASK (1 << 1)
>  
> @@ -769,7 +769,7 @@ static void reset_memory(Flash *s)
>          s->volatile_cfg |= VCFG_WRAP_SEQUENTIAL;
>          if ((s->nonvolatile_cfg & NVCFG_XIP_MODE_MASK)
>                                  != NVCFG_XIP_MODE_DISABLED) {
> -            s->volatile_cfg |= VCFG_XIP_MODE_ENABLED;
> +            s->volatile_cfg |= VCFG_XIP_MODE_DISABLED;
>          }
>          s->volatile_cfg |= deposit32(s->volatile_cfg,
>                              VCFG_DUMMY_CLK_POS,
> @@ -784,10 +784,10 @@ static void reset_memory(Flash *s)
>          s->enh_volatile_cfg |= EVCFG_VPP_ACCELERATOR;
>          s->enh_volatile_cfg |= EVCFG_RESET_HOLD_ENABLED;
>          if (s->nonvolatile_cfg & NVCFG_DUAL_IO_MASK) {
> -            s->enh_volatile_cfg |= EVCFG_DUAL_IO_ENABLED;
> +            s->enh_volatile_cfg |= EVCFG_DUAL_IO_DISABLED;
>          }
>          if (s->nonvolatile_cfg & NVCFG_QUAD_IO_MASK) {
> -            s->enh_volatile_cfg |= EVCFG_QUAD_IO_ENABLED;
> +            s->enh_volatile_cfg |= EVCFG_QUAD_IO_DISABLED;
>          }
>          if (!(s->nonvolatile_cfg & NVCFG_4BYTE_ADDR_MASK)) {
>              s->four_bytes_address_mode = true;
> -- 
> 2.7.4
>