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[PULL 01/24] target/arm: fix stage 2 page-walks in 32-bit emulation
From: |
Peter Maydell |
Subject: |
[PULL 01/24] target/arm: fix stage 2 page-walks in 32-bit emulation |
Date: |
Mon, 23 Nov 2020 11:42:52 +0000 |
From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Using a target unsigned long would limit the Input Address to a LPAE
page-walk to 32 bits on AArch32 and 64 bits on AArch64. This is okay
for stage 1 or on AArch64, but it is insufficient for stage 2 on
AArch32. In that later case, the Input Address can have up to 40 bits.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201118150414.18360-1-remi@remlab.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 11b0803df72..38cd35c0492 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -40,7 +40,7 @@
#ifndef CONFIG_USER_ONLY
-static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
+static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
bool s1_is_el0,
hwaddr *phys_ptr, MemTxAttrs *txattrs, int
*prot,
@@ -10988,7 +10988,7 @@ static ARMVAParameters aa32_va_parameters(CPUARMState
*env, uint32_t va,
* @fi: set to fault info if the translation fails
* @cacheattrs: (if non-NULL) set to the cacheability/shareability attributes
*/
-static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
+static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
bool s1_is_el0,
hwaddr *phys_ptr, MemTxAttrs *txattrs, int
*prot,
--
2.20.1
- [PULL 00/24] target-arm queue, Peter Maydell, 2020/11/23
- [PULL 02/24] hw/arm: Fix bad print format specifiers, Peter Maydell, 2020/11/23
- [PULL 03/24] hw/intc: fix heap-buffer-overflow in rxicu_realize(), Peter Maydell, 2020/11/23
- [PULL 05/24] MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines, Peter Maydell, 2020/11/23
- [PULL 04/24] MAINTAINERS: Cover system/arm/cpu-features.rst with ARM TCG CPUs, Peter Maydell, 2020/11/23
- [PULL 01/24] target/arm: fix stage 2 page-walks in 32-bit emulation,
Peter Maydell <=
- [PULL 06/24] MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx, Peter Maydell, 2020/11/23
- [PULL 07/24] MAINTAINERS: Fix system/arm/orangepi.rst path, Peter Maydell, 2020/11/23
- [PULL 08/24] MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine, Peter Maydell, 2020/11/23
- [PULL 09/24] MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines, Peter Maydell, 2020/11/23
- [PULL 10/24] docs/system: Deprecate raspi2/raspi3 machine aliases, Peter Maydell, 2020/11/23
- [PULL 11/24] docs/system/arm: Document the various raspi boards, Peter Maydell, 2020/11/23
- [PULL 12/24] docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs, Peter Maydell, 2020/11/23
- [PULL 13/24] docs/system/arm: Document the Sharp Zaurus SL-6000, Peter Maydell, 2020/11/23
- [PULL 14/24] target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0, Peter Maydell, 2020/11/23
- [PULL 15/24] linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints, Peter Maydell, 2020/11/23